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authorElyes Haouas <ehaouas@noos.fr>2024-04-10 10:34:08 +0200
committerElyes Haouas <ehaouas@noos.fr>2024-04-11 11:13:18 +0000
commit327a0a7bafb9153b42893ce42bf84458cfa1be1e (patch)
tree0eab2bf8ed9321e47c4fafec4e93e118aba3667a /src/soc/mediatek
parent2f9a579048a406fa9637d4116be9c96a8a936bec (diff)
tree: Drop unused <string.h>
Change-Id: I0e216cbc4acf9571c65c345a1764e74485f89438 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81818 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek')
-rw-r--r--src/soc/mediatek/mt8195/pcie.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/mediatek/mt8195/pcie.c b/src/soc/mediatek/mt8195/pcie.c
index 7f60d68c29..960d0bb480 100644
--- a/src/soc/mediatek/mt8195/pcie.c
+++ b/src/soc/mediatek/mt8195/pcie.c
@@ -8,7 +8,6 @@
#include <soc/pcie.h>
#include <soc/pcie_common.h>
#include <stdlib.h>
-#include <string.h>
#define PCIE_REG_BASE_PORT0 0x112f0000
#define PCIE_RST_CTRL_REG (PCIE_REG_BASE_PORT0 + 0x148)