summaryrefslogtreecommitdiff
path: root/src/soc/mediatek
diff options
context:
space:
mode:
authorHuayang Duan <huayang.duan@mediatek.com>2020-05-31 11:49:25 +0800
committerHung-Te Lin <hungte@chromium.org>2020-08-06 03:03:00 +0000
commit0e6cb83abb7a6892a2ca371baa14a3654ad49e24 (patch)
treea41324e1148193246ceb4aa1d42cd56eb5f83da1 /src/soc/mediatek
parent92fb91935b7e8736dd4e74a446215bd823b9615f (diff)
soc/mediatek/mt8183: Add ddr geometry to support 6GB, 8GB DDR bootup
Currently the DRAM initialization code can only work on 4GB size and want to support larger memory sizes in future, so add geometry information to the DRAM calibration parameters. BUG=none BRANCH=kukui TEST=Boots correctly on Kukui Change-Id: I1fdf50b75c6a552c0a889f21e1a81ab4b9a305fa Signed-off-by: Huayang Duan <huayang.duan@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41949 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/mediatek')
-rw-r--r--src/soc/mediatek/mt8183/dramc_init_setting.c1
-rw-r--r--src/soc/mediatek/mt8183/dramc_pi_calibration_api.c1
-rw-r--r--src/soc/mediatek/mt8183/include/soc/dramc_param.h14
-rw-r--r--src/soc/mediatek/mt8183/include/soc/emi.h3
4 files changed, 14 insertions, 5 deletions
diff --git a/src/soc/mediatek/mt8183/dramc_init_setting.c b/src/soc/mediatek/mt8183/dramc_init_setting.c
index 9ae0aae07f..794fad1c3d 100644
--- a/src/soc/mediatek/mt8183/dramc_init_setting.c
+++ b/src/soc/mediatek/mt8183/dramc_init_setting.c
@@ -5,6 +5,7 @@
#include <delay.h>
#include <soc/emi.h>
#include <soc/dramc_pi_api.h>
+#include <soc/dramc_param.h>
#include <soc/dramc_register.h>
#include <soc/infracfg.h>
#include <string.h>
diff --git a/src/soc/mediatek/mt8183/dramc_pi_calibration_api.c b/src/soc/mediatek/mt8183/dramc_pi_calibration_api.c
index 50d847f542..fce7c9ff4a 100644
--- a/src/soc/mediatek/mt8183/dramc_pi_calibration_api.c
+++ b/src/soc/mediatek/mt8183/dramc_pi_calibration_api.c
@@ -6,6 +6,7 @@
#include <device/mmio.h>
#include <soc/emi.h>
#include <soc/dramc_register.h>
+#include <soc/dramc_param.h>
#include <soc/dramc_pi_api.h>
#include <timer.h>
diff --git a/src/soc/mediatek/mt8183/include/soc/dramc_param.h b/src/soc/mediatek/mt8183/include/soc/dramc_param.h
index a883fe7dce..e35e4f5421 100644
--- a/src/soc/mediatek/mt8183/include/soc/dramc_param.h
+++ b/src/soc/mediatek/mt8183/include/soc/dramc_param.h
@@ -3,14 +3,14 @@
#ifndef SOC_MEDIATEK_MT8183_DRAMC_PARAM_H
#define SOC_MEDIATEK_MT8183_DRAMC_PARAM_H
+#include <soc/dramc_common_mt8183.h>
+#include <soc/emi.h>
#include <stdint.h>
#include <sys/types.h>
-#include "emi.h"
-
enum {
DRAMC_PARAM_HEADER_MAGIC = 0x44524d4b,
- DRAMC_PARAM_HEADER_VERSION = 2,
+ DRAMC_PARAM_HEADER_VERSION = 3,
};
enum DRAMC_PARAM_STATUS_CODES {
@@ -37,10 +37,16 @@ enum DRAMC_PARAM_FLAGS {
DRAMC_FLAG_HAS_SAVED_DATA = 0x0001,
};
+enum DRAMC_PARAM_GEOMETRY_TYPE {
+ DDR_TYPE_2CH_2RK_4GB_2_2,
+ DDR_TYPE_2CH_2RK_6GB_3_3,
+ DDR_TYPE_2CH_2RK_8GB_4_4,
+};
+
struct dramc_param_header {
u32 status; /* DRAMC_PARAM_STATUS_CODES */
u32 magic;
- u32 version;
+ u32 version; /* DRAMC_PARAM_HEADER_VERSION */
u32 size; /* size of whole dramc_param */
u16 config; /* DRAMC_PARAM_CONFIG */
u16 flags; /* DRAMC_PARAM_FLAGS */
diff --git a/src/soc/mediatek/mt8183/include/soc/emi.h b/src/soc/mediatek/mt8183/include/soc/emi.h
index b2d78b965f..cf794dee89 100644
--- a/src/soc/mediatek/mt8183/include/soc/emi.h
+++ b/src/soc/mediatek/mt8183/include/soc/emi.h
@@ -13,8 +13,9 @@ enum DRAMC_PARAM_SOURCE {
};
struct sdram_params {
- u16 source; /* DRAMC_PARAM_SOURCE */
+ u16 source; /* DRAMC_PARAM_SOURCE */
u16 frequency;
+ u32 ddr_geometry; /* DRAMC_PARAM_GEOMETRY_TYPE */
u8 wr_level[CHANNEL_MAX][RANK_MAX][DQS_NUMBER];
/* DUTY */