diff options
| author | Jianjun Wang <jianjun.wang@mediatek.com> | 2024-04-17 11:19:50 +0800 |
|---|---|---|
| committer | Yu-Ping Wu <yupingso@google.com> | 2024-10-28 03:36:27 +0000 |
| commit | 61e3815a255f73db2e5cc669c737fb89756a0bdb (patch) | |
| tree | 5d81534c95af7c3f630394cb00cee8ced59db851 /src/soc/mediatek/mt8196 | |
| parent | e5519ba7265938701aed8603fd0315d518c64509 (diff) | |
soc/mediatek/mt8196: Enable PCIe support
Enable PCIe support for mt8196.
TEST=Build pass, show pcie init pass log:
mtk_pcie_domain_enable: PCIe link up success (1)
BUG=b:317009620
Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
Change-Id: I9c0aaa1c6da8c247b319e7ed2317dd871e276461
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84698
Reviewed-by: Yidi Lin <yidilin@google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8196')
| -rw-r--r-- | src/soc/mediatek/mt8196/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8196/soc.c | 18 |
2 files changed, 18 insertions, 1 deletions
diff --git a/src/soc/mediatek/mt8196/Kconfig b/src/soc/mediatek/mt8196/Kconfig index 6d6f883a11..d97b092b91 100644 --- a/src/soc/mediatek/mt8196/Kconfig +++ b/src/soc/mediatek/mt8196/Kconfig @@ -11,6 +11,7 @@ config SOC_MEDIATEK_MT8196 select SOC_MEDIATEK_COMMON select FLASH_DUAL_IO_READ select ARM64_USE_ARCH_TIMER + select PCI if SOC_MEDIATEK_MT8196 diff --git a/src/soc/mediatek/mt8196/soc.c b/src/soc/mediatek/mt8196/soc.c index b62c055426..eb72fca365 100644 --- a/src/soc/mediatek/mt8196/soc.c +++ b/src/soc/mediatek/mt8196/soc.c @@ -1,8 +1,10 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <device/device.h> +#include <device/pci.h> #include <soc/emi.h> #include <soc/mmu_operations.h> +#include <soc/pcie.h> #include <symbols.h> static void soc_read_resources(struct device *dev) @@ -21,9 +23,23 @@ static struct device_operations soc_ops = { .init = soc_init, }; +static struct device_operations pci_domain_ops = { + .read_resources = &mtk_pcie_domain_read_resources, + .set_resources = &mtk_pcie_domain_set_resources, + .scan_bus = &pci_host_bridge_scan_bus, + .enable = &mtk_pcie_domain_enable, +}; + static void enable_soc_dev(struct device *dev) { - dev->ops = &soc_ops; + if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) { + dev->ops = &soc_ops; + } else if (dev->path.type == DEVICE_PATH_DOMAIN) { + if (mainboard_needs_pcie_init()) + dev->ops = &pci_domain_ops; + else + printk(BIOS_DEBUG, "Skip setting PCIe ops\n"); + } } struct chip_operations soc_mediatek_mt8196_ops = { |