soc/mediatek/mt8196: Add a stub implementation of the MT8196 SoC

Add new folder and basic drivers for Mediatek SoC 'MT8196'.
Refer to MT8196_Chromebook_Application_Processor_Datasheet_V1.0 for
MT8196 SPEC detail.
This patch also enables UART and ARM arch timer.

TEST=saw the coreboot uart log to bootblock
BUG=b:317009620

Change-Id: I8190253ed000db879b04a806ca0bdf29c14be806
Signed-off-by: Jarried Lin <jarried.lin@mediatek.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83572
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yidi Lin <yidilin@google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>

1 files changed, 24 insertions, 0 deletions

diff --git a/src/soc/mediatek/mt8196/Makefile.mk b/src/soc/mediatek/mt8196/Makefile.mk
new file mode 100644
index 0000000000..5afbb9ebef
--- /dev/null
+++ b/src/soc/mediatek/mt8196/Makefile.mk
@@ -0,0 +1,24 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+ifeq ($(CONFIG_SOC_MEDIATEK_MT8196),y)
+
+all-$(CONFIG_SPI_FLASH) += spi.c
+all-y += timer.c
+all-y += ../common/uart.c
+
+bootblock-y += bootblock.c
+bootblock-y += ../common/mmu_operations.c
+
+romstage-y += ../common/cbmem.c
+romstage-y += emi.c
+
+ramstage-y += emi.c
+ramstage-y += soc.c
+
+CPPFLAGS_common += -Isrc/soc/mediatek/mt8196/include
+CPPFLAGS_common += -Isrc/soc/mediatek/common/include
+
+$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
+	./util/mtkheader/gen-bl-img.py mt8196 sf $< $@
+
+endif