diff options
| author | Rex-BC Chen <rex-bc.chen@mediatek.com> | 2022-07-04 20:53:51 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-07-06 15:22:20 +0000 |
| commit | b4c5aed0a6b06e49f97d76755b17d292a36cad4c (patch) | |
| tree | 6c59a140ce494600da05c0c70336339e4d6d5563 /src/soc/mediatek/mt8195 | |
| parent | 7912da87b1cf4098892ace1239ec8946656d5e81 (diff) | |
soc/mediatek: Move some gpio functions to common/gpio_op.c
gpio_set_pull(), gpio_set_pull_pu_pd() and gpio_set_spec_pull_pupd()
can be reused for mt8192, mt8195 and mt8186, so move it to new file
"gpio_op.c" in common folder.
TEST=build pass
BUG=b:233720142
Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: I81ab9b01ee20fccf3ef29c5902597b5045d3e36a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65641
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Yidi Lin <yidilin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8195')
| -rw-r--r-- | src/soc/mediatek/mt8195/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8195/gpio.c | 60 |
2 files changed, 2 insertions, 60 deletions
diff --git a/src/soc/mediatek/mt8195/Makefile.inc b/src/soc/mediatek/mt8195/Makefile.inc index b0d259e3a1..b8c36d1625 100644 --- a/src/soc/mediatek/mt8195/Makefile.inc +++ b/src/soc/mediatek/mt8195/Makefile.inc @@ -2,7 +2,7 @@ ifeq ($(CONFIG_SOC_MEDIATEK_MT8195),y) # for bootblock, verstage, romstage, ramstage all-y += ../common/flash_controller.c -all-y += ../common/gpio.c gpio.c +all-y += ../common/gpio.c ../common/gpio_op.c gpio.c all-y += ../common/i2c.c i2c.c all-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c all-y += ../common/timer.c ../common/timer_prepare.c diff --git a/src/soc/mediatek/mt8195/gpio.c b/src/soc/mediatek/mt8195/gpio.c index 9c741f824a..f344c09dc2 100644 --- a/src/soc/mediatek/mt8195/gpio.c +++ b/src/soc/mediatek/mt8195/gpio.c @@ -3,7 +3,7 @@ #include <device/mmio.h> #include <gpio.h> -static void *gpio_find_reg_addr(gpio_t gpio) +void *gpio_find_reg_addr(gpio_t gpio) { void *reg_addr; switch (gpio.base & 0x0f) { @@ -32,61 +32,3 @@ static void *gpio_find_reg_addr(gpio_t gpio) return reg_addr; } - -static void gpio_set_spec_pull_pupd(gpio_t gpio, enum pull_enable enable, - enum pull_select select) -{ - void *reg1; - void *reg2; - int bit = gpio.bit; - - reg1 = gpio_find_reg_addr(gpio) + gpio.offset; - reg2 = reg1 + (gpio.base & 0xf0); - - if (enable == GPIO_PULL_ENABLE) { - if (select == GPIO_PULL_DOWN) - setbits32(reg1, 1 << bit); - else - clrbits32(reg1, 1 << bit); - } - - if (enable == GPIO_PULL_ENABLE) { - setbits32(reg2, 1 << bit); - } else { - clrbits32(reg2, 1 << bit); - clrbits32(reg2 + 0x010, 1 << bit); - } -} - -static void gpio_set_pull_pu_pd(gpio_t gpio, enum pull_enable enable, - enum pull_select select) -{ - void *reg1; - void *reg2; - int bit = gpio.bit; - - reg1 = gpio_find_reg_addr(gpio) + gpio.offset; - reg2 = reg1 - (gpio.base & 0xf0); - - if (enable == GPIO_PULL_ENABLE) { - if (select == GPIO_PULL_DOWN) { - clrbits32(reg1, 1 << bit); - setbits32(reg2, 1 << bit); - } else { - clrbits32(reg2, 1 << bit); - setbits32(reg1, 1 << bit); - } - } else { - clrbits32(reg1, 1 << bit); - clrbits32(reg2, 1 << bit); - } -} - -void gpio_set_pull(gpio_t gpio, enum pull_enable enable, - enum pull_select select) -{ - if (gpio.flag) - gpio_set_spec_pull_pupd(gpio, enable, select); - else - gpio_set_pull_pu_pd(gpio, enable, select); -} |