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authorJianjun Wang <jianjun.wang@mediatek.com>2022-03-23 15:28:10 +0800
committerPaul Fagerburg <pfagerburg@chromium.org>2022-03-29 15:41:37 +0000
commitacf16bf4f69e417c75021e49bd455a212adbcd46 (patch)
tree7145a5841ad86893c43c40f66b885ed9bbafd927 /src/soc/mediatek/mt8195
parent41faa22c532def4093a65366764d12298c6a10d3 (diff)
soc/mediatek/mt8195: Add early init support
Add early init support for MT8195 platform. TEST=Build pass and boot up to kernel successfully via SSD on Dojo board, here is the SSD information in boot log: == NVME IDENTIFY CONTROLLER DATA == PCI VID : 0x15b7 PCI SSVID : 0x15b7 SN : 21517J440114 MN : WDC PC SN530 SDBPTPZ-256G-1006 RAB : 0x4 AERL : 0x7 SQES : 0x66 CQES : 0x44 NN : 0x1 Identified NVMe model WDC PC SN530 SDBPTPZ-256G-1006 BUG=b:178565024 BRANCH=cherry Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> Change-Id: I4eb7da53ff76c385cab18bbf84970e96b61662ac Reviewed-on: https://review.coreboot.org/c/coreboot/+/63020 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek/mt8195')
-rw-r--r--src/soc/mediatek/mt8195/Makefile.inc2
-rw-r--r--src/soc/mediatek/mt8195/bootblock.c2
-rw-r--r--src/soc/mediatek/mt8195/include/soc/memlayout.ld4
3 files changed, 8 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8195/Makefile.inc b/src/soc/mediatek/mt8195/Makefile.inc
index 68fe0f39b1..b83fc3229f 100644
--- a/src/soc/mediatek/mt8195/Makefile.inc
+++ b/src/soc/mediatek/mt8195/Makefile.inc
@@ -2,6 +2,7 @@ ifeq ($(CONFIG_SOC_MEDIATEK_MT8195),y)
bootblock-y += ../common/auxadc.c
bootblock-y += bootblock.c
+bootblock-y += ../common/early_init.c
bootblock-y += ../common/eint_event.c
bootblock-y += ../common/flash_controller.c
bootblock-y += ../common/gpio.c gpio.c
@@ -53,6 +54,7 @@ romstage-y += mt6360.c
romstage-y += ../common/rtc.c ../common/rtc_osc_init.c ../common/rtc_mt6359p.c
ramstage-y += ../common/auxadc.c
+ramstage-y += ../common/early_init.c
ramstage-y += ../common/ddp.c ddp.c
ramstage-y += devapc.c
ramstage-y += ../common/dfd.c
diff --git a/src/soc/mediatek/mt8195/bootblock.c b/src/soc/mediatek/mt8195/bootblock.c
index 3adf5c17bd..813c0c89fc 100644
--- a/src/soc/mediatek/mt8195/bootblock.c
+++ b/src/soc/mediatek/mt8195/bootblock.c
@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <bootblock_common.h>
+#include <soc/early_init.h>
#include <soc/eint_event.h>
#include <soc/mmu_operations.h>
#include <soc/pll.h>
@@ -14,4 +15,5 @@ void bootblock_soc_init(void)
mtk_wdt_init();
mt_pll_init();
unmask_eint_event_mask();
+ early_init_clear();
}
diff --git a/src/soc/mediatek/mt8195/include/soc/memlayout.ld b/src/soc/mediatek/mt8195/include/soc/memlayout.ld
index 5942776e81..e8b51d2404 100644
--- a/src/soc/mediatek/mt8195/include/soc/memlayout.ld
+++ b/src/soc/mediatek/mt8195/include/soc/memlayout.ld
@@ -19,6 +19,9 @@
_ = ASSERT(size % 4K == 0, \
"DRAM DMA buffer should be multiple of smallest page size (4K)!");
+#define EARLY_INIT(addr, size) \
+ REGION(early_init_data, addr, size, 4)
+
SECTIONS
{
SRAM_START(0x00100000)
@@ -26,6 +29,7 @@ SECTIONS
TPM_TCPA_LOG(0x00103000, 2K)
FMAP_CACHE(0x00103800, 2K)
WATCHDOG_TOMBSTONE(0x00104000, 4)
+ EARLY_INIT(0x00104010, 128)
CBFS_MCACHE(0x00107c00, 8K)
TIMESTAMP(0x00109c00, 1K)
STACK(0x0010a000, 12K)