soc/mediatek: Move some SPM functions to common

Some functions are the same in spm.c for MT8192, MT8195, MT8186 and
MT8188, so we move them to common/spm.c.

TEST=build pass.
BUG=b:236331724

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: I29ddefc47d8bd156fa1ca0cedd4deaed676ae7e4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66972
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>

2 files changed, 7 insertions, 177 deletions

diff --git a/src/soc/mediatek/mt8195/include/soc/spm.h b/src/soc/mediatek/mt8195/include/soc/spm.h
index 25f6d6b14a..1994b1d1ca 100644
--- a/src/soc/mediatek/mt8195/include/soc/spm.h
+++ b/src/soc/mediatek/mt8195/include/soc/spm.h
@@ -6,6 +6,7 @@
 #include <device/mmio.h>
 #include <soc/addressmap.h>
 #include <soc/mtcmos.h>
+#include <soc/spm_common.h>
 #include <types.h>
 
 /* SPM READ/WRITE CFG */
@@ -952,20 +953,6 @@ check_member(mtk_spm_regs, ulposc_con, 0x644);
 
 static struct mtk_spm_regs *const mtk_spm = (void *)SPM_BASE;
 
-struct pcm_desc {
-	u32 pmem_words;
-	u32 total_words;
-	u32 pmem_start;
-	u32 dmem_start;
-};
-
-struct dyna_load_pcm {
-	u8 *buf;		/* binary array */
-	struct pcm_desc desc;
-};
-
-int spm_init(void);
-
 static const struct power_domain_data disp[] = {
 	{
 		.pwr_con = &mtk_spm->vppsys0_pwr_con,
diff --git a/src/soc/mediatek/mt8195/spm.c b/src/soc/mediatek/mt8195/spm.c
index 52b0fd38f2..fc85729d1a 100644
--- a/src/soc/mediatek/mt8195/spm.c
+++ b/src/soc/mediatek/mt8195/spm.c
@@ -1,16 +1,8 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <assert.h>
-#include <console/console.h>
-#include <delay.h>
-#include <device/mmio.h>
 #include <soc/mcu_common.h>
 #include <soc/spm.h>
-#include <soc/spm_common.h>
-#include <soc/symbols.h>
-#include <timer.h>
-
-#define SPM_SYSTEM_BASE_OFFSET	0x40000000
 
 static const struct pwr_ctrl spm_init_ctrl = {
 	.pcm_flags = SPM_FLAG_DISABLE_VCORE_DVS | SPM_FLAG_DISABLE_VCORE_DFS |
@@ -284,7 +276,7 @@ static const struct pwr_ctrl spm_init_ctrl = {
 	.reg_ext_wakeup_event_mask = 0xFFFFFFFF,
 };
 
-static void spm_set_power_control(const struct pwr_ctrl *pwrctrl)
+void spm_set_power_control(const struct pwr_ctrl *pwrctrl)
 {
 	/* Auto-gen Start */
 
@@ -423,7 +415,7 @@ static void spm_set_power_control(const struct pwr_ctrl *pwrctrl)
 	/* Auto-gen End */
 }
 
-static void spm_register_init(void)
+void spm_register_init(void)
 {
 	/* Enable register control */
 	write32(&mtk_spm->poweron_config_set,
@@ -478,24 +470,7 @@ static void spm_register_init(void)
 
 }
 
-static void spm_set_sysclk_settle(void)
-{
-	write32(&mtk_spm->spm_clk_settle, SPM_SYSCLK_SETTLE);
-}
-
-static void spm_code_swapping(void)
-{
-	u32 mask;
-
-	mask = read32(&mtk_spm->spm_wakeup_event_mask);
-	write32(&mtk_spm->spm_wakeup_event_mask,
-		mask & ~SPM_WAKEUP_EVENT_MASK_BIT0);
-	write32(&mtk_spm->spm_cpu_wakeup_event, 1);
-	write32(&mtk_spm->spm_cpu_wakeup_event, 0);
-	write32(&mtk_spm->spm_wakeup_event_mask, mask);
-}
-
-static void spm_reset_and_init_pcm(void)
+void spm_reset_and_init_pcm(void)
 {
 	bool first_load_fw = true;
 
@@ -530,55 +505,7 @@ static void spm_reset_and_init_pcm(void)
 		     REG_MD32_APB_INTERNAL_EN_LSB);
 }
 
-static void spm_kick_im_to_fetch(const struct dyna_load_pcm *pcm)
-{
-	uintptr_t ptr;
-	u32 dmem_words;
-	u32 pmem_words;
-	u32 total_words;
-	u32 pmem_start;
-	u32 dmem_start;
-
-	ptr = (uintptr_t)pcm->buf + SPM_SYSTEM_BASE_OFFSET;
-	pmem_words = pcm->desc.pmem_words;
-	total_words = pcm->desc.total_words;
-	dmem_words = total_words - pmem_words;
-	pmem_start = pcm->desc.pmem_start;
-	dmem_start = pcm->desc.dmem_start;
-
-	printk(BIOS_DEBUG, "%s: ptr = %#lx, pmem/dmem words = %#x/%#x\n",
-	       __func__, (long)ptr, pmem_words, dmem_words);
-
-	/* DMA needs 16-byte aligned source data. */
-	assert(ptr % 16 == 0);
-
-	write32(&mtk_spm->md32pcm_dma0_src, ptr);
-	write32(&mtk_spm->md32pcm_dma0_dst, pmem_start);
-	write32(&mtk_spm->md32pcm_dma0_wppt, pmem_words);
-	write32(&mtk_spm->md32pcm_dma0_wpto, dmem_start);
-	write32(&mtk_spm->md32pcm_dma0_count, total_words);
-	write32(&mtk_spm->md32pcm_dma0_con, MD32PCM_DMA0_CON_VAL);
-	write32(&mtk_spm->md32pcm_dma0_start, MD32PCM_DMA0_START_VAL);
-
-	setbits32(&mtk_spm->pcm_con0, SPM_REGWR_CFG_KEY | PCM_CK_EN_LSB);
-}
-
-static void spm_init_pcm_register(void)
-{
-	/* Init r0 with POWER_ON_VAL0 */
-	write32(&mtk_spm->pcm_reg_data_ini,
-		read32(&mtk_spm->spm_power_on_val0));
-	write32(&mtk_spm->pcm_pwr_io_en, PCM_RF_SYNC_R0);
-	write32(&mtk_spm->pcm_pwr_io_en, 0);
-
-	/* Init r7 with POWER_ON_VAL1 */
-	write32(&mtk_spm->pcm_reg_data_ini,
-		read32(&mtk_spm->spm_power_on_val1));
-	write32(&mtk_spm->pcm_pwr_io_en, PCM_RF_SYNC_R7);
-	write32(&mtk_spm->pcm_pwr_io_en, 0);
-}
-
-static void spm_set_wakeup_event(const struct pwr_ctrl *pwrctrl)
+void spm_set_wakeup_event(const struct pwr_ctrl *pwrctrl)
 {
 	u32 val, mask;
 
@@ -623,91 +550,7 @@ static void spm_set_wakeup_event(const struct pwr_ctrl *pwrctrl)
 			SYS_TIMER_START_EN_LSB, 0);
 }
 
-static void spm_set_pcm_flags(const struct pwr_ctrl *pwrctrl)
+const struct pwr_ctrl *get_pwr_ctrl(void)
 {
-	u32 pcm_flags = pwrctrl->pcm_flags, pcm_flags1 = pwrctrl->pcm_flags1;
-
-	/* Set PCM flags and data */
-	if (pwrctrl->pcm_flags_cust_clr != 0)
-		pcm_flags &= ~pwrctrl->pcm_flags_cust_clr;
-	if (pwrctrl->pcm_flags_cust_set != 0)
-		pcm_flags |= pwrctrl->pcm_flags_cust_set;
-	if (pwrctrl->pcm_flags1_cust_clr != 0)
-		pcm_flags1 &= ~pwrctrl->pcm_flags1_cust_clr;
-	if (pwrctrl->pcm_flags1_cust_set != 0)
-		pcm_flags1 |= pwrctrl->pcm_flags1_cust_set;
-
-	write32(&mtk_spm->spm_sw_flag_0, pcm_flags);
-	write32(&mtk_spm->spm_sw_flag_1, pcm_flags1);
-	write32(&mtk_spm->spm_sw_rsv_7, pcm_flags);
-	write32(&mtk_spm->spm_sw_rsv_8, pcm_flags1);
-}
-
-static void spm_kick_pcm_to_run(const struct pwr_ctrl *pwrctrl)
-{
-	/* Waiting for loading SPMFW done*/
-	while (read32(&mtk_spm->md32pcm_dma0_rlct) != 0x0)
-		;
-
-	/* Init register to match PCM expectation */
-	write32(&mtk_spm->spm_bus_protect_mask_b, SPM_BUS_PROTECT_MASK_B_DEF);
-	write32(&mtk_spm->spm_bus_protect2_mask_b,
-		SPM_BUS_PROTECT2_MASK_B_DEF);
-	write32(&mtk_spm->pcm_reg_data_ini, 0);
-
-	spm_set_pcm_flags(pwrctrl);
-
-	/* Kick PCM to run (only toggle PCM_KICK) */
-	setbits32(&mtk_spm->pcm_con0, SPM_REGWR_CFG_KEY | PCM_CK_EN_LSB);
-
-	/* Reset md32pcm */
-	SET32_BITFIELDS(&mtk_spm->md32pcm_cfgreg_sw_rstn,
-			MD32PCM_CFGREG_SW_RSTN_RESET, 1);
-
-	/* Waiting for SPM init done */
-	udelay(SPM_INIT_DONE_US);
-}
-
-static void reset_spm(struct mtk_mcu *mcu)
-{
-	struct dyna_load_pcm *pcm = (struct dyna_load_pcm *)mcu->priv;
-
-	spm_parse_firmware(mcu);
-	spm_reset_and_init_pcm();
-	spm_kick_im_to_fetch(pcm);
-	spm_init_pcm_register();
-	spm_set_wakeup_event(&spm_init_ctrl);
-	spm_kick_pcm_to_run(&spm_init_ctrl);
-}
-
-static struct mtk_mcu spm = {
-	.firmware_name = CONFIG_SPM_FIRMWARE,
-	.reset = reset_spm,
-};
-
-int spm_init(void)
-{
-	struct dyna_load_pcm pcm;
-	struct stopwatch sw;
-
-	stopwatch_init(&sw);
-
-	spm_register_init();
-	spm_set_power_control(&spm_init_ctrl);
-	spm_set_sysclk_settle();
-
-	spm.load_buffer = _dram_dma;
-	spm.buffer_size = REGION_SIZE(dram_dma);
-	spm.priv = (void *)&pcm;
-
-	if (mtk_init_mcu(&spm)) {
-		printk(BIOS_ERR, "SPM: %s: failed in mtk_init_mcu\n", __func__);
-		return -1;
-	}
-
-	printk(BIOS_INFO, "SPM: %s done in %ld msecs, spm pc = %#x\n",
-	       __func__, stopwatch_duration_msecs(&sw),
-	       read32(&mtk_spm->md32pcm_pc));
-
-	return 0;
+	return &spm_init_ctrl;
 }