diff options
| author | Rex-BC Chen <rex-bc.chen@mediatek.com> | 2021-05-03 20:44:09 +0800 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2021-06-03 01:58:13 +0000 |
| commit | ab2cbf79b5d2508ccc81b64d23215e3abfd3987c (patch) | |
| tree | 423463a3f3d3cbbf5df1f0fbc280a9bb08fc15cf /src/soc/mediatek/mt8195/Makefile.inc | |
| parent | aea59401d053690ce06a5f89be272865e7905682 (diff) | |
soc/mediatek: Initialize SSPM
Load SSPM firmware and boot up SSPM in ramstage.
This adds 23ms to the boot time.
TEST=Load SSPM blob ok, and we can see some logs of SSPM from AP.
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: Ia227ea9f7d58129068cb36ec2de7d9feb677006b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55051
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek/mt8195/Makefile.inc')
| -rw-r--r-- | src/soc/mediatek/mt8195/Makefile.inc | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/soc/mediatek/mt8195/Makefile.inc b/src/soc/mediatek/mt8195/Makefile.inc index 1f89a587c5..ae325d59fc 100644 --- a/src/soc/mediatek/mt8195/Makefile.inc +++ b/src/soc/mediatek/mt8195/Makefile.inc @@ -54,6 +54,7 @@ ramstage-y += ../common/mmu_operations.c mmu_operations.c ramstage-y += ../common/mtcmos.c mtcmos.c ramstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c ramstage-y += soc.c +ramstage-y += ../common/sspm.c ramstage-y += ../common/timer.c timer.c ramstage-y += ../common/uart.c ramstage-y += ../common/ufs.c @@ -66,7 +67,8 @@ BL31_MAKEARGS += PLAT=mt8195 MT8195_BLOB_DIR := 3rdparty/blobs/soc/mediatek/mt8195 mcu-firmware-files := \ - $(CONFIG_MCUPM_FIRMWARE) + $(CONFIG_MCUPM_FIRMWARE) \ + $(CONFIG_SSPM_FIRMWARE) $(foreach fw, $(call strip_quotes,$(mcu-firmware-files)), \ $(eval $(fw)-file := $(MT8195_BLOB_DIR)/$(fw)) \ |