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| author | Yidi Lin <yidi.lin@mediatek.com> | 2021-04-22 13:34:04 +0800 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2021-04-26 02:42:33 +0000 |
| commit | 6968782ac0309bd0178eb4a421355e1bb7bf3a92 (patch) | |
| tree | f50a54a2fe0c3a800044a6148b82816d7ad4f669 /src/soc/mediatek/mt8195/Makefile.inc | |
| parent | fdad5ad74baea3f29495126c31159a9bcb352d79 (diff) | |
soc/mediatek/mt8195: Initialize watchdog
MT8195 requires writing speical value to mode register to clear
status register. This value is invalid on other platforms. We can
do this safely in the common watchdog driver.
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Change-Id: Iba5b41f426fc38719bb343a220e0724bff229c79
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52542
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek/mt8195/Makefile.inc')
| -rw-r--r-- | src/soc/mediatek/mt8195/Makefile.inc | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8195/Makefile.inc b/src/soc/mediatek/mt8195/Makefile.inc index ab7561f2d1..3fa1d1993d 100644 --- a/src/soc/mediatek/mt8195/Makefile.inc +++ b/src/soc/mediatek/mt8195/Makefile.inc @@ -5,22 +5,26 @@ bootblock-y += ../common/mmu_operations.c bootblock-$(CONFIG_SPI_FLASH) += spi.c bootblock-y += ../common/timer.c bootblock-y += ../common/uart.c +bootblock-y += ../common/wdt.c verstage-$(CONFIG_SPI_FLASH) += spi.c verstage-y += ../common/timer.c verstage-y += ../common/uart.c +verstage-y += ../common/wdt.c romstage-y += ../common/cbmem.c romstage-y += emi.c romstage-$(CONFIG_SPI_FLASH) += spi.c romstage-y += ../common/timer.c romstage-y += ../common/uart.c +romstage-y += ../common/wdt.c ramstage-y += emi.c ramstage-$(CONFIG_SPI_FLASH) += spi.c ramstage-y += soc.c ramstage-y += ../common/timer.c ramstage-y += ../common/uart.c +ramstage-y += ../common/wdt.c CPPFLAGS_common += -Isrc/soc/mediatek/mt8195/include CPPFLAGS_common += -Isrc/soc/mediatek/common/include |