diff options
| author | Yidi Lin <yidi.lin@mediatek.com> | 2021-02-02 21:00:36 +0800 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2021-04-28 02:41:43 +0000 |
| commit | 2368a310be4bf60ea9c83fc89e89be9d6a040775 (patch) | |
| tree | 9c346d5c793178b25d3bfeceb756cbe3ffcb5d75 /src/soc/mediatek/mt8192/pmif_clk.c | |
| parent | 15ddb363d4d869fa1c3512e7fbf9682ec41375bf (diff) | |
soc/mediatek: Move the common part of PMIC drivers to common/
The PMIC drivers can be shared by MT8192 and MT8195.
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Change-Id: Ie17e01d25405b1e5119d9c70c5f7afb915daf80b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52666
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek/mt8192/pmif_clk.c')
| -rw-r--r-- | src/soc/mediatek/mt8192/pmif_clk.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/soc/mediatek/mt8192/pmif_clk.c b/src/soc/mediatek/mt8192/pmif_clk.c index cdcdacc91c..a597b6a724 100644 --- a/src/soc/mediatek/mt8192/pmif_clk.c +++ b/src/soc/mediatek/mt8192/pmif_clk.c @@ -84,7 +84,7 @@ static u32 pmif_get_ulposc_freq_mhz(u32 cali_val) return result / 1000; } -static int pmif_ulposc_cali(void) +static int pmif_ulposc_cali(u32 target_val) { u32 current_val = 0, min = 0, max = CAL_MAX_VAL, middle; int ret = 0, diff_by_min, diff_by_max, cal_result; @@ -95,16 +95,16 @@ static int pmif_ulposc_cali(void) break; current_val = pmif_get_ulposc_freq_mhz(middle); - if (current_val > FREQ_260MHZ) + if (current_val > target_val) max = middle; else min = middle; } while (min <= max); - diff_by_min = pmif_get_ulposc_freq_mhz(min) - FREQ_260MHZ; + diff_by_min = pmif_get_ulposc_freq_mhz(min) - target_val; diff_by_min = ABS(diff_by_min); - diff_by_max = pmif_get_ulposc_freq_mhz(max) - FREQ_260MHZ; + diff_by_max = pmif_get_ulposc_freq_mhz(max) - target_val; diff_by_max = ABS(diff_by_max); if (diff_by_min < diff_by_max) { @@ -116,8 +116,8 @@ static int pmif_ulposc_cali(void) } /* check if calibrated value is in the range of target value +- 15% */ - if (current_val < (FREQ_260MHZ * (1000 - CAL_TOL_RATE) / 1000) || - current_val > (FREQ_260MHZ * (1000 + CAL_TOL_RATE) / 1000)) { + if (current_val < (target_val * (1000 - CAL_TOL_RATE) / 1000) || + current_val > (target_val * (1000 + CAL_TOL_RATE) / 1000)) { printk(BIOS_ERR, "[%s] calibration fail: %dM\n", __func__, current_val); ret = 1; } @@ -140,7 +140,7 @@ static int pmif_init_ulposc(void) udelay(100); SET32_BITFIELDS(&mtk_spm->ulposc_con, ULPOSC_CG_EN, 1); - return pmif_ulposc_cali(); + return pmif_ulposc_cali(FREQ_260MHZ); } int pmif_clk_init(void) |