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authorRex-BC Chen <rex-bc.chen@mediatek.com>2021-07-12 15:01:11 +0800
committerFelix Held <felix-coreboot@felixheld.de>2021-08-06 14:43:02 +0000
commiteef442d0c1d4bab616aaa077d80a56c64cac6f1e (patch)
tree54a92fa860db870ad2fed22ea2006579799cf672 /src/soc/mediatek/mt8192/include
parent59c9327cbd7af6aace8587f71f47d25396b57b7b (diff)
soc/mediatek/mt8192: initialize DFD
DFD (Design for Debug) is a debugging tool, which scans flip-flops and dumps to internal RAM on the WDT reset. After system reboots, those values could be showed for debugging. Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Change-Id: I39a4391c1d1e832d77b709f8f899bb1c6dcacd69 Reviewed-on: https://review.coreboot.org/c/coreboot/+/56797 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek/mt8192/include')
-rw-r--r--src/soc/mediatek/mt8192/include/soc/dfd.h17
1 files changed, 17 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8192/include/soc/dfd.h b/src/soc/mediatek/mt8192/include/soc/dfd.h
new file mode 100644
index 0000000000..650e5fd091
--- /dev/null
+++ b/src/soc/mediatek/mt8192/include/soc/dfd.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef SOC_MEDIATEK_MT8192_DFD_H
+#define SOC_MEDIATEK_MT8192_DFD_H
+
+#define CPC_FLOW_CTRL_CFG 0x0C53A814
+#define RESET_ON_KEEP_EN BIT(17)
+
+/* DFD dump address and size need to be the same as defined in Kernel DTS. */
+#define DFD_DUMP_ADDRESS 0x6A000000
+#define DFD_DUMP_SIZE (1 * MiB)
+
+static u32 *const dfd_cfg = (void *)CPC_FLOW_CTRL_CFG;
+
+void dfd_init(void);
+
+#endif