diff options
author | Yidi Lin <yidi.lin@mediatek.com> | 2021-03-11 17:31:02 +0800 |
---|---|---|
committer | Hung-Te Lin <hungte@chromium.org> | 2021-03-15 02:27:57 +0000 |
commit | 2fcbebbbcde4b13df5807d771beeffb0490a9644 (patch) | |
tree | acdf1c1bd3bfb1dead798cee3eba0ba373152576 /src/soc/mediatek/mt8192/Makefile.inc | |
parent | 50c667de524339bb839de71ce0e785a1693d5de3 (diff) |
mb/google/asurada: revise PMIC and RTC initialization
Move the initialization from bootblock to romstage for following reasons:
- Follow MT8183 initialization sequence.
- PMIC and RTC functions are only called after verstage.
- Reduce bootblock size.
- PMIC initialization setting is complex and may need to be changed by
an RW firmware update.
TEST=boot to kernel successfully
Change-Id: I3e4c3f918639590ffc73076450235771d06aae91
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51409
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Xi Chen <xixi.chen@mediatek.com>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Diffstat (limited to 'src/soc/mediatek/mt8192/Makefile.inc')
-rw-r--r-- | src/soc/mediatek/mt8192/Makefile.inc | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/src/soc/mediatek/mt8192/Makefile.inc b/src/soc/mediatek/mt8192/Makefile.inc index 2370c654c5..f88ca11e63 100644 --- a/src/soc/mediatek/mt8192/Makefile.inc +++ b/src/soc/mediatek/mt8192/Makefile.inc @@ -2,7 +2,6 @@ ifeq ($(CONFIG_SOC_MEDIATEK_MT8192),y) bootblock-y += ../common/auxadc.c bootblock-y += bootblock.c -bootblock-y += clkbuf.c srclken_rc.c bootblock-y += eint_event.c bootblock-y += ../common/flash_controller.c bootblock-y += ../common/gpio.c gpio.c @@ -13,10 +12,6 @@ bootblock-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c bootblock-y += ../common/timer.c bootblock-y += ../common/uart.c bootblock-y += ../common/wdt.c -bootblock-y += pmif.c pmif_clk.c pmif_spi.c pmif_spmi.c -bootblock-y += ../common/rtc.c ../common/rtc_osc_init.c rtc.c -bootblock-y += mt6315.c -bootblock-y += mt6359p.c verstage-y += ../common/auxadc.c verstage-y += ../common/flash_controller.c @@ -28,6 +23,7 @@ verstage-y += ../common/uart.c romstage-y += ../common/auxadc.c romstage-y += ../common/cbmem.c +romstage-y += clkbuf.c srclken_rc.c romstage-y += ../common/dram_init.c romstage-y += ../common/dramc_param.c romstage-y += ../common/flash_controller.c @@ -40,6 +36,7 @@ romstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c romstage-y += ../common/timer.c romstage-y += ../common/uart.c romstage-y += pmif.c pmif_clk.c pmif_spi.c pmif_spmi.c +romstage-y += ../common/rtc.c ../common/rtc_osc_init.c rtc.c romstage-y += mt6315.c romstage-y += mt6359p.c |