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authorYuchen Huang <yuchen.huang@mediatek.com>2020-09-23 20:41:19 +0800
committerHung-Te Lin <hungte@chromium.org>2021-01-19 04:02:07 +0000
commitec39cb3a80c13dd385810f2b004819652f8cc8da (patch)
tree610a905017fc1ce69150cfd06597b56af997c2d3 /src/soc/mediatek/mt8192/Kconfig
parent68cb9ed0680a8197f0aeedc190eace2ffca62a0a (diff)
soc/mediatek/mt8192: add clkbuf and srclken_rc MT6359P driver
Add clkbuf and srclken_rc init for low power. Reference datasheet: Document No: RH-D-2018-0205. TEST=boot asurada Signed-off-by: Ran Bi <ran.bi@mediatek.com> Change-Id: I947bf14df7a307bf359c590c2a20265882b3f1be Reviewed-on: https://review.coreboot.org/c/coreboot/+/46878 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek/mt8192/Kconfig')
-rw-r--r--src/soc/mediatek/mt8192/Kconfig7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8192/Kconfig b/src/soc/mediatek/mt8192/Kconfig
index fd0a4cdb8d..e2d7eeac13 100644
--- a/src/soc/mediatek/mt8192/Kconfig
+++ b/src/soc/mediatek/mt8192/Kconfig
@@ -82,4 +82,11 @@ config FLASH_DUAL_READ
When this option is enabled, the flash controller provides the ability
to dual read mode.
+config SRCLKEN_RC_SUPPORT
+ bool
+ default y
+ help
+ This option enables clock buffer remote controller module
+ to control PMIC 26MHz clock output.
+
endif