diff options
| author | Nina Wu <nina-cm.wu@mediatek.corp-partner.google.com> | 2023-09-07 17:21:39 +0800 |
|---|---|---|
| committer | Yu-Ping Wu <yupingso@google.com> | 2023-10-02 06:31:53 +0000 |
| commit | 244ec489f22b0a70c06c03262b3bd881635c78df (patch) | |
| tree | 30ce5b5c56caff0646867c319e36c0213e31419c /src/soc/mediatek/mt8188/include | |
| parent | 3748fca5955bc975ea426cf9bd9fd8e9278a9752 (diff) | |
soc/mediatek/mt8188: devapc: Update permission for master domain setup
Currently, all the masters controlled by DAPC are in domain 0. With
this setting, there is a potential security problem. For example, if a
certain master is somehow hacked, it may attempt to access registers
that it is not supposed to, with successful results. This is due to the
fact that, in the current setting, all masters are in domain 0 and can
access almost all registers. To prevent this problem, we assign masters
to different domains and restrict access to registers based on each
domain.
This patch updates the permission settings for domains 2, 3, 4, 5, 7,
8, 9, and 14, as these domains will be assigned masters in the upcoming
patch.
BUG=b:270657858
TEST=build pass
Change-Id: I6e95ddb5d84a09ff865d7615596430e25b69d3fc
Signed-off-by: Nina Wu <nina-cm.wu@mediatek.com>
Signed-off-by: Jason Chen <Jason-ch.Chen@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77861
Reviewed-by: Yidi Lin <yidilin@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek/mt8188/include')
| -rw-r--r-- | src/soc/mediatek/mt8188/include/soc/addressmap.h | 2 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8188/include/soc/devapc.h | 9 |
2 files changed, 8 insertions, 3 deletions
diff --git a/src/soc/mediatek/mt8188/include/soc/addressmap.h b/src/soc/mediatek/mt8188/include/soc/addressmap.h index 74489764f9..01620b4508 100644 --- a/src/soc/mediatek/mt8188/include/soc/addressmap.h +++ b/src/soc/mediatek/mt8188/include/soc/addressmap.h @@ -41,6 +41,7 @@ enum { DEVAPC_PERI_PAR_AO_BASE = IO_PHYS + 0x0003C000, PERI_PAR_AO_BASE = IO_PHYS + 0x00040000, FMEM_AO_BASE = IO_PHYS + 0x00042000, + DEVAPC_FMEM_AO_BASE = IO_PHYS + 0x00044000, DBG_TRACKER_BASE = IO_PHYS + 0x00208000, PERI_TRACKER_BASE = IO_PHYS + 0x00218000, EMI0_BASE = IO_PHYS + 0x00219000, @@ -52,6 +53,7 @@ enum { I2C4_DMA_BASE = IO_PHYS + 0x00220380, I2C5_DMA_BASE = IO_PHYS + 0x00220480, I2C6_DMA_BASE = IO_PHYS + 0x00220600, + DEVAPC_INFRA2_AO_BASE = IO_PHYS + 0x00228000, DRAMC_CHA_AO_BASE = IO_PHYS + 0x00230000, INFRA_TRACKER_BASE = IO_PHYS + 0x00314000, SSPM_SRAM_BASE = IO_PHYS + 0x00400000, diff --git a/src/soc/mediatek/mt8188/include/soc/devapc.h b/src/soc/mediatek/mt8188/include/soc/devapc.h index 161ae9b28b..0f320bac6a 100644 --- a/src/soc/mediatek/mt8188/include/soc/devapc.h +++ b/src/soc/mediatek/mt8188/include/soc/devapc.h @@ -11,13 +11,14 @@ enum devapc_ao_offset { SYS0_D0_APC_0 = 0x00000, SYS1_D0_APC_0 = 0x01000, SYS2_D0_APC_0 = 0x02000, + DOM_REMAP_0_0 = 0x00800, + DOM_REMAP_0_1 = 0x00804, + DOM_REMAP_2_0 = 0x00820, MAS_DOM_0 = 0x00900, MAS_SEC_0 = 0x00A00, AO_APC_CON = 0x00F00, }; -DEFINE_BIT(MCUPM_SEC, 1) - /****************************************************************************** * STRUCTURE DEFINITION ******************************************************************************/ @@ -54,6 +55,8 @@ enum devapc_cfg_index { /****************************************************************************** * Bit Field DEFINITION ******************************************************************************/ - /* TODO */ +/* INFRA */ +DEFINE_BIT(CPU_EB_SEC, 1) +DEFINE_BIT(SCP_SSPM_SEC, 2) #endif /* SOC_MEDIATEK_MT8188_DEVAPC_H */ |