diff options
| author | Xi Chen <xixi.chen@mediatek.corp-partner.google.com> | 2022-08-18 11:23:26 +0800 |
|---|---|---|
| committer | Martin Roth <martin.roth@amd.corp-partner.google.com> | 2022-08-31 16:43:51 +0000 |
| commit | df0396149aba5171d64b9fbab0856dc9f07b1c15 (patch) | |
| tree | 4350d24966f228a759e46f617430a13cb8aea0dc /src/soc/mediatek/mt8188/Makefile.inc | |
| parent | cd37368c6c8b18dc73e90dc964eb581162d5a1ed (diff) | |
soc/mediatek/mt8188: Support 4 channel DRAM in DPM init flow
TEST=build pass
BUG=b:236331724
Signed-off-by: Xi Chen <xixi.chen@mediatek.corp-partner.google.com>
Change-Id: Ia68aca1d1e8729739246157904727123e5d001e8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66968
Reviewed-by: Yidi Lin <yidilin@google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8188/Makefile.inc')
| -rw-r--r-- | src/soc/mediatek/mt8188/Makefile.inc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8188/Makefile.inc b/src/soc/mediatek/mt8188/Makefile.inc index 6f4255204c..ee677a3895 100644 --- a/src/soc/mediatek/mt8188/Makefile.inc +++ b/src/soc/mediatek/mt8188/Makefile.inc @@ -30,6 +30,8 @@ romstage-y += ../common/rtc.c ../common/rtc_osc_init.c ../common/rtc_mt6359p.c ramstage-y += ../common/auxadc.c ramstage-y += ../common/dfd.c +ramstage-y += ../common/dpm.c +ramstage-$(CONFIG_DPM_FOUR_CHANNEL) += ../common/dpm_4ch.c ramstage-y += ../common/emi.c ramstage-y += ../common/mcu.c ramstage-y += ../common/mcupm.c |