diff options
| author | Mandy Liu <mandyjh.liu@mediatek.com> | 2022-10-11 13:40:07 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-10-14 16:01:56 +0000 |
| commit | 55a1ba30437c546763dee2476b0f0fbccc3530c3 (patch) | |
| tree | f9dcc244bdff0de0f53b3dd983735fa9ba2f2bcd /src/soc/mediatek/mt8186/mtcmos.c | |
| parent | f32d1e3acbff0180e608f8965073c10b26cf626f (diff) | |
soc/mediatek/mt8186: Add mtcmos power-on control for ADSP
To use SOF correctly, we need to enable power domain of ADSP.
TEST=SOF driver is functional.
BUG=b:204229221
Signed-off-by: Mandy Liu <mandyjh.liu@mediatek.com>
Change-Id: I39d1357af5f901a91379fdf7e595f16952b962de
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68288
Reviewed-by: Yidi Lin <yidilin@google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8186/mtcmos.c')
| -rw-r--r-- | src/soc/mediatek/mt8186/mtcmos.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8186/mtcmos.c b/src/soc/mediatek/mt8186/mtcmos.c index 314edd536e..621be2776b 100644 --- a/src/soc/mediatek/mt8186/mtcmos.c +++ b/src/soc/mediatek/mt8186/mtcmos.c @@ -3,12 +3,26 @@ #include <device/mmio.h> #include <soc/infracfg.h> #include <soc/mtcmos.h> +#include <soc/spm.h> enum { DISP_PROT_STEP_2_MASK = 0x00000C06, DISP_PROT_STEP_1_MASK = 0x00001800, }; +enum { + TOP_AXI_PROT_EN_3_ADSP_TOP_STEP1 = 0x00001800, + TOP_AXI_PROT_EN_3_ADSP_TOP_STEP2 = 0x00000003, +}; + +void mtcmos_adsp_power_on(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(adsp); i++) + mtcmos_power_on(&adsp[i]); +} + void mtcmos_protect_display_bus(void) { write32(&mt8186_infracfg_ao->infra_topaxi_protecten_clr, @@ -21,3 +35,11 @@ void mtcmos_protect_audio_bus(void) { /* No need to do protection since MT8186 doesn't have audio mtcmos. */ } + +void mtcmos_protect_adsp_bus(void) +{ + write32(&mt8186_infracfg_ao->infra_topaxi_protecten_3_clr, + TOP_AXI_PROT_EN_3_ADSP_TOP_STEP2); + write32(&mt8186_infracfg_ao->infra_topaxi_protecten_3_clr, + TOP_AXI_PROT_EN_3_ADSP_TOP_STEP1); +} |