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authorRuwen Liu <ot_ruwen.liu@mediatek.com>2021-11-04 13:30:23 +0800
committerHung-Te Lin <hungte@chromium.org>2021-11-08 09:02:47 +0000
commit0480a19d4c59eb3502b6d12618f437943b163fdf (patch)
treebedb44f8807300c9d38057ceb01b96ec316e3d1e /src/soc/mediatek/mt8186/include
parent381860454fb5a1a6ffc4c8d1fdf3f021f75cbcbc (diff)
soc/mediatek/mt8186: Add SPI driver support
Add SPI controller drivers. TEST=build pass BUG=b:202871018 Signed-off-by: Ruwen Liu <ot_ruwen.liu@mediatek.com> Change-Id: I59a885c4fa31b6e2921698eaa3b97dbdc3144946 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58966 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek/mt8186/include')
-rw-r--r--src/soc/mediatek/mt8186/include/soc/spi.h17
1 files changed, 16 insertions, 1 deletions
diff --git a/src/soc/mediatek/mt8186/include/soc/spi.h b/src/soc/mediatek/mt8186/include/soc/spi.h
index fbf3995b7a..15e7b9182f 100644
--- a/src/soc/mediatek/mt8186/include/soc/spi.h
+++ b/src/soc/mediatek/mt8186/include/soc/spi.h
@@ -8,7 +8,22 @@
#ifndef MTK_MT8186_SPI_H
#define MTK_MT8186_SPI_H
-#include <spi-generic.h>
+#include <soc/spi_common.h>
+
+#define SPI_BUS_NUMBER 6
+
+#define GET_SCK_REG(x) x->spi_cfg2_reg
+
+DEFINE_BITFIELD(SPI_CFG_CS_HOLD, 15, 0)
+DEFINE_BITFIELD(SPI_CFG_CS_SETUP, 31, 16)
+
+DEFINE_BITFIELD(SPI_CFG_SCK_LOW, 15, 0)
+DEFINE_BITFIELD(SPI_CFG_SCK_HIGH, 31, 16)
+
+DEFINE_BITFIELD(SPI_CFG1_CS_IDLE, 7, 0)
+DEFINE_BITFIELD(SPI_CFG1_PACKET_LOOP, 15, 8)
+DEFINE_BITFIELD(SPI_CFG1_PACKET_LENGTH, 28, 16)
+DEFINE_BITFIELD(SPI_CFG1_TICK_DLY, 31, 29)
enum {
SPI_NOR_GPIO_SET0 = 0,