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authorYidi Lin <yidilin@chromium.org>2024-09-05 17:10:33 +0800
committerFelix Held <felix-coreboot@felixheld.de>2024-09-12 16:57:11 +0000
commitf3b698462975a5b23004affca45a6dd1a3ff46a6 (patch)
treea94a1af1b963d6140081e5c4b8c2e4d50304d974 /src/soc/mediatek/mt8183/spi.c
parentffc48178de6eee2e4efd33b4943f922475badc71 (diff)
soc/mediatek: Remove redundant struct pad_func and PAD_* definitions
Clean up redundant `struct pad_func` and `PAD_*` definitions. This patch also refactors the PAD_* macros by, - Repurposing PAD_FUNC and dropping PAD_FUNC_SEL. - Adding PAD_FUNC_DOWN and PAD_FUNC_UP to avoid the implicit initialization. BUG=none TEST=emerge-{elm, kukui, asurada, cherry, corsola, geralt, rauru} coreboot Change-Id: I12b8f6749015bff52988208a7c3aa01e952612c6 Signed-off-by: Yidi Lin <yidilin@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84222 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8183/spi.c')
-rw-r--r--src/soc/mediatek/mt8183/spi.c52
1 files changed, 22 insertions, 30 deletions
diff --git a/src/soc/mediatek/mt8183/spi.c b/src/soc/mediatek/mt8183/spi.c
index 9404f93c13..bf1b3b5a1c 100644
--- a/src/soc/mediatek/mt8183/spi.c
+++ b/src/soc/mediatek/mt8183/spi.c
@@ -35,58 +35,50 @@ struct mtk_spi_bus spi_bus[SPI_BUS_NUMBER] = {
}
};
-struct pad_func {
- u8 pin_id;
- u8 func;
-};
-
-#define PAD_FUNC(name, func) {PAD_##name##_ID, PAD_##name##_FUNC_##func}
-#define PAD_FUNC_GPIO(name) {PAD_##name##_ID, 0}
-
static const struct pad_func pad0_funcs[SPI_BUS_NUMBER][4] = {
{
- PAD_FUNC(SPI_MI, SPI0_MI),
+ PAD_FUNC_DOWN(SPI_MI, SPI0_MI),
PAD_FUNC_GPIO(SPI_CSB),
- PAD_FUNC(SPI_MO, SPI0_MO),
- PAD_FUNC(SPI_CLK, SPI0_CLK),
+ PAD_FUNC_DOWN(SPI_MO, SPI0_MO),
+ PAD_FUNC_DOWN(SPI_CLK, SPI0_CLK),
},
{
- PAD_FUNC(SPI1_MI, SPI1_A_MI),
+ PAD_FUNC_DOWN(SPI1_MI, SPI1_A_MI),
PAD_FUNC_GPIO(SPI1_CSB),
- PAD_FUNC(SPI1_MO, SPI1_A_MO),
- PAD_FUNC(SPI1_CLK, SPI1_A_CLK),
+ PAD_FUNC_DOWN(SPI1_MO, SPI1_A_MO),
+ PAD_FUNC_DOWN(SPI1_CLK, SPI1_A_CLK),
},
{
- PAD_FUNC(KPCOL1, SPI2_MI),
+ PAD_FUNC_DOWN(KPCOL1, SPI2_MI),
PAD_FUNC_GPIO(EINT0),
- PAD_FUNC(EINT1, SPI2_MO),
- PAD_FUNC(EINT2, SPI2_CLK),
+ PAD_FUNC_DOWN(EINT1, SPI2_MO),
+ PAD_FUNC_DOWN(EINT2, SPI2_CLK),
},
{
- PAD_FUNC(DPI_D8, SPI3_MI),
+ PAD_FUNC_DOWN(DPI_D8, SPI3_MI),
PAD_FUNC_GPIO(DPI_D9),
- PAD_FUNC(DPI_D10, SPI3_MO),
- PAD_FUNC(DPI_D11, SPI3_CLK),
+ PAD_FUNC_DOWN(DPI_D10, SPI3_MO),
+ PAD_FUNC_DOWN(DPI_D11, SPI3_CLK),
},
{
- PAD_FUNC(DPI_D4, SPI4_MI),
+ PAD_FUNC_DOWN(DPI_D4, SPI4_MI),
PAD_FUNC_GPIO(DPI_D5),
- PAD_FUNC(DPI_D6, SPI4_MO),
- PAD_FUNC(DPI_D7, SPI4_CLK),
+ PAD_FUNC_DOWN(DPI_D6, SPI4_MO),
+ PAD_FUNC_DOWN(DPI_D7, SPI4_CLK),
},
{
- PAD_FUNC(DPI_D0, SPI5_MI),
+ PAD_FUNC_DOWN(DPI_D0, SPI5_MI),
PAD_FUNC_GPIO(DPI_D1),
- PAD_FUNC(DPI_D2, SPI5_MO),
- PAD_FUNC(DPI_D3, SPI5_CLK),
+ PAD_FUNC_DOWN(DPI_D2, SPI5_MO),
+ PAD_FUNC_DOWN(DPI_D3, SPI5_CLK),
}
};
static const struct pad_func bus1_pad1_funcs[4] = {
- PAD_FUNC(EINT7, SPI1_B_MI),
+ PAD_FUNC_DOWN(EINT7, SPI1_B_MI),
PAD_FUNC_GPIO(EINT8),
- PAD_FUNC(EINT9, SPI1_B_MO),
- PAD_FUNC(EINT10, SPI1_B_CLK),
+ PAD_FUNC_DOWN(EINT9, SPI1_B_MO),
+ PAD_FUNC_DOWN(EINT10, SPI1_B_CLK),
};
void mtk_spi_set_gpio_pinmux(unsigned int bus, enum spi_pad_mask pad_select)
@@ -100,7 +92,7 @@ void mtk_spi_set_gpio_pinmux(unsigned int bus, enum spi_pad_mask pad_select)
ptr = bus1_pad1_funcs;
}
for (int i = 0; i < 4; i++)
- gpio_set_mode((gpio_t){.id = ptr[i].pin_id}, ptr[i].func);
+ gpio_set_mode(ptr[i].gpio, ptr[i].func);
}
const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = {