diff options
| author | Huayang Duan <huayang.duan@mediatek.com> | 2019-09-24 14:07:11 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-10-18 12:21:31 +0000 |
| commit | cea735cf127e090fbb5fa588bd5d7bd3c959e49f (patch) | |
| tree | fa9e222b0932791c6bd813f2bb64a1a6fcd61ccc /src/soc/mediatek/mt8183/include | |
| parent | 107927b319d8bdffbe66d596906d06d47b7cbbed (diff) | |
soc/mediatek/mt8183: Run calibration with multiple frequencies for DVFS switch
The patch adds config MT8183_DRAM_DVFS to enable DRAM calibration with
multiple frequencies to support DVFS switch.
BUG=b:80501386,b:142358843
BRANCH=kukui
TEST=Boots correctly on Kukui
Change-Id: I97c8e513dc3815a2d62b2904a246a1d8567704a4
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35555
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Diffstat (limited to 'src/soc/mediatek/mt8183/include')
| -rw-r--r-- | src/soc/mediatek/mt8183/include/soc/dramc_register.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/mediatek/mt8183/include/soc/dramc_register.h b/src/soc/mediatek/mt8183/include/soc/dramc_register.h index 61019b3110..b3ee6af4c7 100644 --- a/src/soc/mediatek/mt8183/include/soc/dramc_register.h +++ b/src/soc/mediatek/mt8183/include/soc/dramc_register.h @@ -288,7 +288,7 @@ struct dramc_ao_regs { uint32_t rsvd_10[46]; struct dramc_ao_regs_rk rk[3]; uint32_t rsvd_16[64]; - struct { + struct dramc_ao_regs_shu { uint32_t rsvd0[64]; uint32_t actim[7]; uint32_t actim_xrt; |