mediatek: Share PLL code among similar SOCs

Refactor PLL code which will be reused among similar SOCs.

BUG=b:80501386
BRANCH=none
TEST=Boots correctly on Elm

Change-Id: I11f044fbef93d4f5f4388368c510958d2b0ae66c
Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com>
Reviewed-on: https://review.coreboot.org/27305
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 3 insertions, 3 deletions

diff --git a/src/soc/mediatek/mt8173/Makefile.inc b/src/soc/mediatek/mt8173/Makefile.inc
index d66183250e..003feabece 100644
--- a/src/soc/mediatek/mt8173/Makefile.inc
+++ b/src/soc/mediatek/mt8173/Makefile.inc
@@ -18,7 +18,7 @@ ifeq ($(CONFIG_SOC_MEDIATEK_MT8173),y)
 bootblock-y += bootblock.c
 bootblock-$(CONFIG_SPI_FLASH) += flash_controller.c
 bootblock-y += i2c.c
-bootblock-y += pll.c
+bootblock-y += ../common/pll.c pll.c
 bootblock-y += spi.c
 bootblock-y += ../common/timer.c
 bootblock-y += timer.c
@@ -47,7 +47,7 @@ verstage-y += gpio.c
 ################################################################################
 
 romstage-$(CONFIG_SPI_FLASH) += flash_controller.c
-romstage-y += pll.c
+romstage-y += ../common/pll.c pll.c
 romstage-y += ../common/timer.c
 romstage-y += timer.c
 
@@ -75,7 +75,7 @@ ramstage-y += mt6311.c
 ramstage-y += da9212.c
 ramstage-y += gpio.c
 ramstage-y += ../common/wdt.c
-ramstage-y += pll.c
+ramstage-y += ../common/pll.c pll.c
 ramstage-y += rtc.c
 
 ramstage-y += usb.c