summaryrefslogtreecommitdiff
path: root/src/soc/mediatek/common
diff options
context:
space:
mode:
authorMartin Roth <gaumless@gmail.com>2023-10-26 11:51:55 -0600
committerFelix Held <felix-coreboot@felixheld.de>2023-11-07 08:37:42 +0000
commitf9bc2c46995f24909abedf220dc89170d8c0d756 (patch)
treed752b127469f8227f18b27dca611a74401d9dbae /src/soc/mediatek/common
parentb34b4bf0dd70ff9346c21846e9b9ba3c6452f645 (diff)
vc/amd/opensil/genoa_poc/openSIL: Add openSIL code as submodule
This is a RW mirror of AMD's openSIL for Genoa with additions from Arthur Heymans. - origin/openSIL/main from https://github.com/openSIL/openSIL.git - origin/ArthurHeymans/64b_public from https://github.com/ArthurHeymans/openSIL.git The current main branch starts with Arthur's branch and adds 5 commits from the AMD's openSIL repo. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I8917edf3a6a8493ffa9230902cafcc6234d3d571 Reviewed-on: https://review.coreboot.org/c/coreboot/+/78187 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc/mediatek/common')
0 files changed, 0 insertions, 0 deletions