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authorRex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com>2021-12-21 12:52:40 +0800
committerFelix Held <felix-coreboot@felixheld.de>2021-12-26 10:05:22 +0000
commitf371a78d907666afde4d945a56f9ca1e9c2152c8 (patch)
tree9dc7ab56424a3152f972cd0c208b90819e875c30 /src/soc/mediatek/common
parentd22cdbe73fb06e4fbb56884f83fcf27cca14e7e1 (diff)
soc/medaitek/mt8195: adjust USB phy shift value
There is a design issue of bit shift which will drop a bit for USB3 phy on MT8195. Therefore, we add this patch to set USB phy registers from value of efuse. BUG=b:211528577 TEST=build pass Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Signed-off-by: Tianping Fang <tianping.fang@mediatek.corp-partner.google.com> Tested-by: Tianping Fang <tianping.fang@mediatek.corp-partner.google.com> Change-Id: I43cb6c1c795dd181d6eba7f3bc52e4eb1a602081 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60312 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/common')
-rw-r--r--src/soc/mediatek/common/include/soc/usb_common.h9
-rw-r--r--src/soc/mediatek/common/usb.c11
2 files changed, 17 insertions, 3 deletions
diff --git a/src/soc/mediatek/common/include/soc/usb_common.h b/src/soc/mediatek/common/include/soc/usb_common.h
index 6fa050dcdf..d390b70ffa 100644
--- a/src/soc/mediatek/common/include/soc/usb_common.h
+++ b/src/soc/mediatek/common/include/soc/usb_common.h
@@ -130,9 +130,13 @@ struct sif_u2_phy_com {
check_member(sif_u2_phy_com, u2phydtm0, 0x68);
struct sif_u3phyd {
- u32 reserved0[23];
+ u32 reserved0[4];
+ u32 phyd_cal0;
+ u32 phyd_cal1;
+ u32 reserved1[15];
+ u32 phyd_reserved;
u32 phyd_cdr1;
- u32 reserved1[40];
+ u32 reserved2[41];
};
struct sif_u3phya {
@@ -155,6 +159,7 @@ struct sif_u3phya_da {
* SOCs will not need it.
*/
void mtk_usb_prepare(void);
+void mtk_usb_adjust_phy_shift(void);
void setup_usb_host(void);
diff --git a/src/soc/mediatek/common/usb.c b/src/soc/mediatek/common/usb.c
index 52daaac117..b9fe83529d 100644
--- a/src/soc/mediatek/common/usb.c
+++ b/src/soc/mediatek/common/usb.c
@@ -140,7 +140,15 @@ static inline void ssusb_soft_reset(void)
clrbits32(&ippc_regs->ip_pw_ctr0, CTRL0_IP_SW_RST);
}
-__weak void mtk_usb_prepare(void) { /* do nothing */ }
+__weak void mtk_usb_prepare(void)
+{
+ /* do nothing */
+}
+
+__weak void mtk_usb_adjust_phy_shift(void)
+{
+ /* do nothing */
+}
void setup_usb_host(void)
{
@@ -153,5 +161,6 @@ void setup_usb_host(void)
return;
}
u3phy_power_on();
+ mtk_usb_adjust_phy_shift();
u3p_msg("phy power-on done.\n");
}