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authorBo-Chen Chen <rex-bc.chen@mediatek.com>2022-09-29 18:45:37 +0800
committerYu-Ping Wu <yupingso@google.com>2022-10-25 08:30:15 +0000
commitf09872c5bd0fa2d4b6f4e52259ab3355e8489244 (patch)
treef503826a13dca15bab1ac88f37f2d63d00f89164 /src/soc/mediatek/common/mtcmos.c
parent8a604bdbae9d5ddb1ba4ae699d978ebb38746663 (diff)
soc/mediatek/mt8188: Update mtcmos settings for display and audio
- For display, only vdosys0_pwr_con and edp_tx_pwr_con settings are required. - For audio, it requires powering on adsp_ao_pwr_con, adsp_infra_pwr_con and audio_pwr_con. - Add new power domain data `ext_buck_iso_bits` for buck isolation control. BUG=b:244208960 TEST=access display registers successfully. Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Change-Id: I7f00bda0cc5c7f8dea55a564a0ff10ae601115b3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68489 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yidi Lin <yidilin@google.com> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek/common/mtcmos.c')
-rw-r--r--src/soc/mediatek/common/mtcmos.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/soc/mediatek/common/mtcmos.c b/src/soc/mediatek/common/mtcmos.c
index 52bd46810e..2f4bd22d54 100644
--- a/src/soc/mediatek/common/mtcmos.c
+++ b/src/soc/mediatek/common/mtcmos.c
@@ -14,11 +14,19 @@ enum {
PWR_RST_B = 1U << 0
};
+__weak void mtcmos_set_scpd_ext_buck_iso(const struct power_domain_data *pd)
+{
+ /* do nothing */
+}
+
void mtcmos_power_on(const struct power_domain_data *pd)
{
write32(&mtk_spm->poweron_config_set,
(SPM_PROJECT_CODE << 16) | (1U << 0));
+ if (pd->caps & SCPD_EXT_BUCK_ISO)
+ mtcmos_set_scpd_ext_buck_iso(pd);
+
setbits32(pd->pwr_con, PWR_ON);
setbits32(pd->pwr_con, PWR_ON_2ND);