diff options
author | Hung-Te Lin <hungte@chromium.org> | 2019-08-07 08:44:30 +0800 |
---|---|---|
committer | Julius Werner <jwerner@chromium.org> | 2019-08-13 02:21:36 +0000 |
commit | 61e346624a2c8b7e3de5313f2f4bfa2d4359e660 (patch) | |
tree | b6423901a5de995677bf700be8669d181fb80523 /src/soc/mediatek/common/include | |
parent | c59fbf2bb80ed1e9cfca837cf9f35a08d6b4129c (diff) |
soc/mediatek: dsi: Unify format to bpp conversion
The 'bpp' was referred to both 'bits per pixel' and 'bytes per pixel' in
MTK DSI driver and should be corrected. By this change we now always
consider 'bpp' as 'bits per pixel', and rename the variables for other
cases.
BUG=b:80501386,b:117254947
TEST=make -j # board = oak and boots
Change-Id: Ibd405220b73859e5592c68f498af07eef8d7edbc
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34770
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/common/include')
-rw-r--r-- | src/soc/mediatek/common/include/soc/dsi_common.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/mediatek/common/include/soc/dsi_common.h b/src/soc/mediatek/common/include/soc/dsi_common.h index cebf9af701..7a48d53507 100644 --- a/src/soc/mediatek/common/include/soc/dsi_common.h +++ b/src/soc/mediatek/common/include/soc/dsi_common.h @@ -303,7 +303,8 @@ enum { /* Functions that each SOC should provide. */ void mtk_dsi_reset(void); /* mtk_dsi_phy_clk_setting should return the data rate in Mbps. */ -int mtk_dsi_phy_clk_setting(u32 format, u32 lanes, const struct edid *edid); +int mtk_dsi_phy_clk_setting(u32 bits_per_pixel, u32 lanes, + const struct edid *edid); /* Public API provided in common/dsi.c */ int mtk_dsi_init(u32 mode_flags, u32 format, u32 lanes, |