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author | Xi Chen <xixi.chen@mediatek.com> | 2021-03-03 17:58:07 +0800 |
---|---|---|
committer | Hung-Te Lin <hungte@chromium.org> | 2021-03-08 01:50:11 +0000 |
commit | e8c681cc6249cc7717885a12373e4fcf34034b1c (patch) | |
tree | a9daf5f6700869b9e6dc3b5faaf8fe1ab8b53d7f /src/soc/mediatek/common/Kconfig | |
parent | 022b1b992f24890a04851dccc2829284a0431d6a (diff) |
soc/mediatek/common: Move DRAM implementation from mt8192 to common
To reduce duplicated dram sources on seperate SOCs,
add dpm, dram_init, dramc_params, memory(fast-k or full-k)
implementations, also add dramc log level macro header files.
Signed-off-by: Xi Chen <xixi.chen@mediatek.com>
Change-Id: I557c96b3d09828472b8b6f932b0192a90894043e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51203
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Diffstat (limited to 'src/soc/mediatek/common/Kconfig')
-rw-r--r-- | src/soc/mediatek/common/Kconfig | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/src/soc/mediatek/common/Kconfig b/src/soc/mediatek/common/Kconfig new file mode 100644 index 0000000000..543bc02d13 --- /dev/null +++ b/src/soc/mediatek/common/Kconfig @@ -0,0 +1,32 @@ +config SOC_MEDIATEK_COMMON + bool + help + common code blocks for Mediatek SOCs + +if SOC_MEDIATEK_COMMON + +config MEDIATEK_DRAM_DVFS + bool + default n + help + This option enables DRAM calibration with multiple frequencies (low, + medium and high frequency groups, with total 7 frequencies) for DVFS + feature. All supported data rates are: 800, 1200, 1600, 1866, 2400, + 3200, 4266. + +config MEDIATEK_DRAM_DVFS_LIMIT_FREQ_CNT + bool + default y + select MEDIATEK_DRAM_DVFS + help + This options limit DRAM frequency calibration count from total 7 to 3, + other frequency will directly use the low frequency shu result. + +config MEMORY_TEST + bool + default y + help + This option enables memory basic compare test to verify the DRAM read + or write is as expected. + +endif |