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authorHakim Giydan <hgiydan@marvell.com>2016-09-08 10:20:23 -0700
committerMartin Roth <martinroth@google.com>2016-09-13 16:55:53 +0200
commit449368c2f08387923575b802cc40d0538d636439 (patch)
treee65404c8786794f650fb68ea54be03bee3e36724 /src/soc/marvell/mvmap2315/timer.c
parent4f2754c7201ef09b1619cc8c2ae9399616374214 (diff)
soc/marvell: Add stub implementation of MVMAP2315 SOC
Most things still need to be filled in, but this will allow us to build boards which use this SOC. Nvidia Tegra210 SOC and Rochchip Rk3399 SOC has been used as templates to create this directory. Change-Id: I8cc3e99df915bb289a2f3539db103cd6be90a0b2 Signed-off-by: Hakim Giydan <hgiydan@marvell.com> Reviewed-on: https://review.coreboot.org/15506 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/marvell/mvmap2315/timer.c')
-rw-r--r--src/soc/marvell/mvmap2315/timer.c63
1 files changed, 63 insertions, 0 deletions
diff --git a/src/soc/marvell/mvmap2315/timer.c b/src/soc/marvell/mvmap2315/timer.c
new file mode 100644
index 0000000000..7922e05a79
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/timer.c
@@ -0,0 +1,63 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+#include <arch/io.h>
+#include <delay.h>
+#include <soc/timer.h>
+#include <timer.h>
+
+void init_timer(void)
+{
+ /* disable timer */
+ clrbits_le32(&mvmap2315_timer0->t1cr, MVMAP2315_TIMER_T1CR_TE);
+
+ /* set to free-running mode (loads max value at timer expiration) */
+ clrbits_le32(&mvmap2315_timer0->t1cr, MVMAP2315_TIMER_T1CR_TM);
+
+ /* mask interrupt (not currently used) */
+ setbits_le32(&mvmap2315_timer0->t1cr, MVMAP2315_TIMER_T1CR_TIM);
+
+ /* disable PWM output */
+ clrbits_le32(&mvmap2315_timer0->t1cr, MVMAP2315_TIMER_T1CR_TPWM);
+
+ /* perform dummy read to clear all active interrupts */
+ read32(&mvmap2315_timer0->t1eoi);
+
+ /* must provide an initial load count even in free-running mode */
+ write32(&mvmap2315_timer0->t1lc, 0xFFFFFFFF);
+
+ /* enable timer */
+ setbits_le32(&mvmap2315_timer0->t1cr, MVMAP2315_TIMER_T1CR_TE);
+
+ /* busy wait until timer count is non-zero */
+ while (!read32(&mvmap2315_timer0->t1cv))
+ ;
+}
+
+static u32 timer_raw_value(void)
+{
+ /* invert count to change from down to up count */
+ return ~read32(&mvmap2315_timer0->t1cv);
+}
+
+void timer_monotonic_get(struct mono_time *mt)
+{
+ mt->microseconds = (long)(timer_raw_value() /
+ MVMAP2315_CLOCKS_PER_USEC);
+}