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| author | Andrey Petrov <anpetrov@fb.com> | 2020-04-30 12:47:25 -0700 |
|---|---|---|
| committer | Andrey Petrov <andrey.petrov@gmail.com> | 2020-05-01 23:11:38 +0000 |
| commit | f8f9b282b4f7ce2f6b83005db0f9aa5cf3f810ec (patch) | |
| tree | 4924947c29c3693aea1e7e608cf6412ee225d2b5 /src/soc/intel | |
| parent | 8fb221dbd5ce11d27616a36eb6d5dc38bec7fd45 (diff) | |
mb/intel/cedarisland_crb: Populate 2-socket parameters for FSP-M
These parameters were found to work fine for 2-socket configuration,
for FSP based on tag 16.D.21.
Signed-off-by: Andrey Petrov <anpetrov@fb.com>
Change-Id: I466a7f2951ef307036ddaed0be0aacf98dd2710f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40917
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel')
0 files changed, 0 insertions, 0 deletions