diff options
author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-03-22 16:39:57 -0600 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2021-03-28 16:04:23 +0000 |
commit | eb6ebc025ed5de4985ef756efe38917fca827981 (patch) | |
tree | 943e7e0f75ae3446345746127a6d16cd3b438e1d /src/soc/intel | |
parent | 6edbb18901565d60bc61fda9ac75da08cb94ff84 (diff) |
soc/intel/tigerlake: Move TCSS code to intel/common/block
The Type-C subsystem ("TCSS") IP block is similar between TGL and
ADL. For pre-boot purposes, the limited amount of functionality required
appears to be common between the two, therefore move the functionality
to intel/common/block and rename from `early_tcss to `tcss` along the way.
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I1c6bb9c7098691f0c828f9d5ab4bd522515ae966
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51753
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
-rw-r--r-- | src/soc/intel/common/block/include/intelblocks/tcss.h (renamed from src/soc/intel/tigerlake/include/soc/early_tcss.h) | 16 | ||||
-rw-r--r-- | src/soc/intel/common/block/tcss/Kconfig | 10 | ||||
-rw-r--r-- | src/soc/intel/common/block/tcss/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/intel/common/block/tcss/tcss.c (renamed from src/soc/intel/tigerlake/early_tcss.c) | 9 | ||||
-rw-r--r-- | src/soc/intel/tigerlake/Kconfig | 11 | ||||
-rw-r--r-- | src/soc/intel/tigerlake/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/intel/tigerlake/fsp_params.c | 7 |
7 files changed, 27 insertions, 28 deletions
diff --git a/src/soc/intel/tigerlake/include/soc/early_tcss.h b/src/soc/intel/common/block/include/intelblocks/tcss.h index 8e45607d83..68e279ca2a 100644 --- a/src/soc/intel/tigerlake/include/soc/early_tcss.h +++ b/src/soc/intel/common/block/include/intelblocks/tcss.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef _EARLY_TCSS_H_ -#define _EARLY_TCSS_H_ +#ifndef _TCSS_H_ +#define _TCSS_H_ /* PMC IPC related offsets and commands */ #define PMC_IPC_USBC_CMD_ID 0xA7 @@ -136,14 +136,14 @@ struct tcss_port_map { uint8_t usb3_port; /* USB3 Port Number */ }; -void tcss_early_configure(void); +void tcss_configure(void); /* - * Mainboard method to setup any mux config needed for early TCSS display operations. + * Mainboard method to setup any mux config needed for TCSS display operations. * This function will need to obtain any mux data needed to forward to IOM/PMC - * Since the mux data may be stored differently by different mainboards this function - * must be defined by mainboard with its specific mux data stored in a tcss_mux_info - * struct as defined above. + * Since the mux data may be stored differently by different mainboards this + * function must be defined by mainboard with its specific mux data stored in a + * tcss_mux_info struct as defined above. * Returns completed tcss_mux_info structure for the specified port */ const struct tcss_mux_info *mainboard_tcss_get_mux_info(int port); @@ -155,4 +155,4 @@ const struct tcss_mux_info *mainboard_tcss_get_mux_info(int port); */ const struct tcss_port_map *mainboard_tcss_get_port_info(size_t *num_ports); -#endif /* _EARLY_TCSS_H_ */ +#endif /* _TCSS_H_ */ diff --git a/src/soc/intel/common/block/tcss/Kconfig b/src/soc/intel/common/block/tcss/Kconfig new file mode 100644 index 0000000000..f35390178e --- /dev/null +++ b/src/soc/intel/common/block/tcss/Kconfig @@ -0,0 +1,10 @@ +config SOC_INTEL_COMMON_BLOCK_TCSS + def_bool n + help + Sets up USB2/3 port mapping in TCSS MUX and sets MUX to disconnect state + +config TCSS_DISPLAY + bool "Enable early TCSS display" + depends on SOC_INTEL_COMMON_BLOCK_TCSS && RUN_FSP_GOP + help + Enable displays to be detected over Type-C ports during boot. diff --git a/src/soc/intel/common/block/tcss/Makefile.inc b/src/soc/intel/common/block/tcss/Makefile.inc new file mode 100644 index 0000000000..a3910808f8 --- /dev/null +++ b/src/soc/intel/common/block/tcss/Makefile.inc @@ -0,0 +1 @@ +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_TCSS) += tcss.c diff --git a/src/soc/intel/tigerlake/early_tcss.c b/src/soc/intel/common/block/tcss/tcss.c index e32c29fc1b..97805f55e6 100644 --- a/src/soc/intel/tigerlake/early_tcss.c +++ b/src/soc/intel/common/block/tcss/tcss.c @@ -4,12 +4,11 @@ #include <console/console.h> #include <device/pci.h> #include <intelblocks/pmc_ipc.h> +#include <intelblocks/tcss.h> +#include <inttypes.h> #include <security/vboot/vboot_common.h> -#include <soc/early_tcss.h> #include <soc/pci_devs.h> #include <stdlib.h> -#include <inttypes.h> - static uint32_t tcss_make_conn_cmd(int u, int u3, int u2, int ufp, int hsl, int sbu, int acc) @@ -308,7 +307,7 @@ static void tcss_configure_dp_mode(const struct tcss_port_map *port_map, size_t } } -void tcss_early_configure(void) +void tcss_configure(void) { const struct tcss_port_map *port_map; size_t num_ports; @@ -321,6 +320,6 @@ void tcss_early_configure(void) for (i = 0; i < num_ports; i++) tcss_init_mux(i, &port_map[i]); - if (CONFIG(EARLY_TCSS_DISPLAY)) + if (CONFIG(TCSS_DISPLAY)) tcss_configure_dp_mode(port_map, num_ports); } diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index afebc0f3c4..d77ad52723 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -239,17 +239,6 @@ config PRERAM_CBMEM_CONSOLE_SIZE hex default 0x2000 -config EARLY_TCSS - bool "Enable early TCSS device Init" - help - Sets up USB2/3 port mapping in TCSS MUX and sets MUX to disconnect state - -config EARLY_TCSS_DISPLAY - bool "Enable early TCSS display" if EARLY_TCSS - depends on EARLY_TCSS && RUN_FSP_GOP - help - Enable displays to be detected over Type-C ports during boot. - config DATA_BUS_WIDTH int default 128 diff --git a/src/soc/intel/tigerlake/Makefile.inc b/src/soc/intel/tigerlake/Makefile.inc index 25aa3f9286..572b96ee56 100644 --- a/src/soc/intel/tigerlake/Makefile.inc +++ b/src/soc/intel/tigerlake/Makefile.inc @@ -30,7 +30,6 @@ romstage-y += reset.c ramstage-y += acpi.c ramstage-y += chip.c ramstage-y += cpu.c -ramstage-$(CONFIG_EARLY_TCSS) += early_tcss.c ramstage-y += elog.c ramstage-y += espi.c ramstage-y += finalize.c diff --git a/src/soc/intel/tigerlake/fsp_params.c b/src/soc/intel/tigerlake/fsp_params.c index 6d08e1f68c..6bd4a7cbe1 100644 --- a/src/soc/intel/tigerlake/fsp_params.c +++ b/src/soc/intel/tigerlake/fsp_params.c @@ -14,10 +14,10 @@ #include <intelblocks/lpss.h> #include <intelblocks/mp_init.h> #include <intelblocks/pmclib.h> +#include <intelblocks/tcss.h> #include <intelblocks/xdci.h> #include <intelpch/lockdown.h> #include <security/vboot/vboot_common.h> -#include <soc/early_tcss.h> #include <soc/gpio_soc_defs.h> #include <soc/intel/common/vbt.h> #include <soc/pci_devs.h> @@ -463,8 +463,9 @@ void platform_fsp_multi_phase_init_cb(uint32_t phase_index) /* TCSS specific initialization here */ printk(BIOS_DEBUG, "FSP MultiPhaseSiInit %s/%s called\n", __FILE__, __func__); - if (CONFIG(EARLY_TCSS)) - tcss_early_configure(); + + if (CONFIG(SOC_INTEL_COMMON_BLOCK_TCSS)) + tcss_configure(); break; default: break; |