diff options
| author | Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> | 2021-09-23 21:49:29 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-10-11 12:45:47 +0000 |
| commit | e0bff814da754f4c44fb5702fb9cfb70f02c1611 (patch) | |
| tree | 5fa2110f3b96959219199c4396fe560d8bf7c6ac /src/soc/intel | |
| parent | 14886aec990bb7dcf4ecc479985c4f23413c925b (diff) | |
drivers/intel/dptf: Add support for PCH methods
Add various methods support for pch device under dptf driver.
This provides support of different control knobs for FIVR.
BUG=b:198582766
BRANCH=None
TEST=Build FW and test on brya0 board
Change-Id: I2d40fff98cb4eb9144d55fd5383d9946e4cb0558
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57925
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/alderlake/dptf.c | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/src/soc/intel/alderlake/dptf.c b/src/soc/intel/alderlake/dptf.c index ba604cae88..37754dbfae 100644 --- a/src/soc/intel/alderlake/dptf.c +++ b/src/soc/intel/alderlake/dptf.c @@ -12,10 +12,16 @@ static const struct dptf_platform_info adl_dptf_platform_info = { .fan_hid = "INTC1048", /* _HID for the toplevel TPCH device, typically \_SB.TPCH */ .tpch_device_hid = "INTC1049", - /* RFC0 method name */ - .tpch_rfc0_method = "RFC0", - /* RFC1 method name */ - .tpch_rfc1_method = "RFC1", + + .tpch_method_names = { + .set_fivr_low_clock_method = "RFC0", + .set_fivr_high_clock_method = "RFC1", + .get_fivr_low_clock_method = "GFC0", + .get_fivr_high_clock_method = "GFC1", + .get_fivr_ssc_method = "GEMI", + .get_fivr_switching_fault_status = "GFFS", + .get_fivr_switching_freq_mhz = "GFCS", + }, }; const struct dptf_platform_info *get_dptf_platform_info(void) |