diff options
| author | Eric Lai <eric_lai@quanta.corp-partner.google.com> | 2022-04-12 10:36:41 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-04-14 15:42:32 +0000 |
| commit | daed4ea1d0503210fbec8241a25d60a67ac91bc3 (patch) | |
| tree | 1c929c26daf44706df1e85d7603634c9ef22e3be /src/soc/intel | |
| parent | 32e1022611d232af0d1b817bc5d8adeb7cf8f6a2 (diff) | |
soc/intel/common/gpio: Add PAD_CFG_GPI_SCI_LOW/HIGH_LOCK macro
Add PAD_CFG_GPI_SCI_LOW_LOCK and PAD_CFG_GPI_SCI_HIGH_LOCK macro
to support mainboard to lock NC and GPI_SCI pins as applicable.
BUG=b:216583542
TEST=build passed
Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Change-Id: I5060777cc09af6cb3144ad799154e77167521de3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63569
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/gpio_defs.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/gpio_defs.h b/src/soc/intel/common/block/include/intelblocks/gpio_defs.h index 32a7d6b08e..efa960cf8a 100644 --- a/src/soc/intel/common/block/include/intelblocks/gpio_defs.h +++ b/src/soc/intel/common/block/include/intelblocks/gpio_defs.h @@ -452,9 +452,15 @@ #define PAD_CFG_GPI_SCI_LOW(pad, pull, rst, trig) \ PAD_CFG_GPI_SCI(pad, pull, rst, trig, INVERT) +#define PAD_CFG_GPI_SCI_LOW_LOCK(pad, pull, trig, lock_action) \ + PAD_CFG_GPI_SCI_LOCK(pad, pull, trig, INVERT, lock_action) + #define PAD_CFG_GPI_SCI_HIGH(pad, pull, rst, trig) \ PAD_CFG_GPI_SCI(pad, pull, rst, trig, NONE) +#define PAD_CFG_GPI_SCI_HIGH_LOCK(pad, pull, trig, lock_action) \ + PAD_CFG_GPI_SCI_LOCK(pad, pull, trig, NONE, lock_action) + #define PAD_CFG_GPI_SCI_DEBEN(pad, pull, rst, trig, inv, dur) \ _PAD_CFG_STRUCT_3(pad, \ PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_BUF(TX_DISABLE) | \ |