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authorBora Guvendik <bora.guvendik@intel.com>2019-05-24 14:14:53 -0700
committerSubrata Banik <subrata.banik@intel.com>2019-09-09 13:10:33 +0000
commitc42ef561a09decc6d82d0e57ea4e5d796b1c25ac (patch)
tree1ede3b10f665e17c6e373cb909b07f81efdbc6af /src/soc/intel
parent22d66efe652534a476e8165aa902138e19dedeb1 (diff)
soc/intel/cannonlake: Add ability to disable Heci1
Decide if HECI1 should be hidden prior to boot to OS. BUG=none TEST=Boot to OS, verify if Heci1 is disabled on hatch system using FSP 1344. Change-Id: I7c63316c8b04fb101d34064daac5ba4fdc05a63c Signed-off-by: Bora Guvendik <bora.guvendik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32992 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/cannonlake/fsp_params.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c
index 5cdddc6bf2..06c556ca74 100644
--- a/src/soc/intel/cannonlake/fsp_params.c
+++ b/src/soc/intel/cannonlake/fsp_params.c
@@ -349,6 +349,9 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
params->ScsUfsEnabled = dev->enabled;
params->Heci3Enabled = config->Heci3Enabled;
+#if !CONFIG(HECI_DISABLE_USING_SMM)
+ params->Heci1Disabled = !config->HeciEnabled;
+#endif
params->Device4Enable = config->Device4Enable;
/* VrConfig Settings for 5 domains