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authorAppukuttan V K <appukuttan.vk@intel.com>2024-05-17 14:29:18 +0530
committerLean Sheng Tan <sheng.tan@9elements.com>2024-05-31 20:36:45 +0000
commitc097c4788b4d9e770327193d26ea708f315d8307 (patch)
tree037fefaa38ac40eec80c67a91f01fb206d777afe /src/soc/intel
parent1f97d801ce5a0908bbe6adaf4c4b7f656d40a198 (diff)
soc/intel: Fix pointer size mismatch errors in crashlog
The crashlog code in intel/common/block and meteorlake soc was casting integer addresses directly to pointer types, which caused compilation errors in x86_64 bit builds. This commit fixes the issue by using uintptr_t for casting integer addresses to pointer types before dereferencing. BUG=b:329034258 TEST=Successfully build Meteor Lake (rex) in both x86_32 and x86_64 modes. Change-Id: I2d0814a8b767270ec140341bfb51d0782469545d Signed-off-by: Appukuttan V K <appukuttan.vk@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82481 Reviewed-by: Subrata Banik <subratabanik@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <ericllai@google.com> Reviewed-by: Dinesh Gehlot <digehlot@google.com> Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/common/block/crashlog/crashlog.c12
-rw-r--r--src/soc/intel/meteorlake/crashlog.c12
2 files changed, 12 insertions, 12 deletions
diff --git a/src/soc/intel/common/block/crashlog/crashlog.c b/src/soc/intel/common/block/crashlog/crashlog.c
index a9ac8a530e..d92d7bc69b 100644
--- a/src/soc/intel/common/block/crashlog/crashlog.c
+++ b/src/soc/intel/common/block/crashlog/crashlog.c
@@ -112,7 +112,7 @@ int cpu_cl_poll_mailbox_ready(u32 cl_mailbox_addr)
u16 stall_cnt = 0;
do {
- cl_mailbox_interface.data = read32((u32 *)cl_mailbox_addr);
+ cl_mailbox_interface.data = read32((u32 *)(uintptr_t)cl_mailbox_addr);
udelay(CPU_CRASHLOG_WAIT_STALL);
stall_cnt++;
} while ((cl_mailbox_interface.fields.busy == 1)
@@ -140,7 +140,7 @@ int cpu_cl_mailbox_cmd(u8 cmd, u8 param)
cl_mailbox_intf.fields.param = param;
cl_mailbox_intf.fields.busy = 1;
- write32((u32 *)(cl_base_addr + cl_get_cpu_mb_int_addr()),
+ write32((u32 *)(uintptr_t)(cl_base_addr + cl_get_cpu_mb_int_addr()),
cl_mailbox_intf.data);
cpu_cl_poll_mailbox_ready(cl_base_addr + cl_get_cpu_mb_int_addr());
@@ -167,7 +167,7 @@ int pmc_cl_gen_descriptor_table(u32 desc_table_addr,
pmc_crashlog_desc_table_t *descriptor_table)
{
int total_data_size = 0;
- descriptor_table->numb_regions = read32((u32 *)desc_table_addr);
+ descriptor_table->numb_regions = read32((u32 *)(uintptr_t)desc_table_addr);
printk(BIOS_DEBUG, "CL PMC desc table: numb of regions is 0x%x at addr 0x%x\n",
descriptor_table->numb_regions, desc_table_addr);
for (int i = 0; i < descriptor_table->numb_regions; i++) {
@@ -178,7 +178,7 @@ int pmc_cl_gen_descriptor_table(u32 desc_table_addr,
break;
}
desc_table_addr += 4;
- descriptor_table->regions[i].data = read32((u32 *)(desc_table_addr));
+ descriptor_table->regions[i].data = read32((u32 *)(uintptr_t)(desc_table_addr));
total_data_size += descriptor_table->regions[i].bits.size * sizeof(u32);
printk(BIOS_DEBUG, "CL PMC desc table: region 0x%x has size 0x%x at offset 0x%x\n",
i, descriptor_table->regions[i].bits.size,
@@ -295,7 +295,7 @@ bool cl_copy_data_from_sram(u32 src_bar,
u32 src_addr = src_bar + offset;
- u32 data = read32((u32 *)src_addr);
+ u32 data = read32((u32 *)(uintptr_t)src_addr);
/* First 32bits of the record must not be 0xdeadbeef */
if (data == INVALID_CRASHLOG_RECORD) {
@@ -320,7 +320,7 @@ bool cl_copy_data_from_sram(u32 src_bar,
u32 copied = 0;
while (copied < size) {
/* DW by DW copy: byte access to PMC SRAM not allowed */
- *dest_addr = read32((u32 *)src_addr);
+ *dest_addr = read32((u32 *)(uintptr_t)src_addr);
dest_addr++;
src_addr += 4;
copied++;
diff --git a/src/soc/intel/meteorlake/crashlog.c b/src/soc/intel/meteorlake/crashlog.c
index 6d654d7e0b..0321e00406 100644
--- a/src/soc/intel/meteorlake/crashlog.c
+++ b/src/soc/intel/meteorlake/crashlog.c
@@ -34,7 +34,7 @@ static u32 disc_tab_addr;
static u64 get_disc_tab_header(void)
{
- return read64((void *)disc_tab_addr);
+ return read64((void *)(uintptr_t)disc_tab_addr);
}
/* Get the SRAM BAR. */
@@ -338,7 +338,7 @@ static bool cpu_cl_gen_discovery_table(void)
disc_tab_addr = bar_addr + get_disc_table_offset();
- u32 dw0 = read32((u32 *)disc_tab_addr);
+ u32 dw0 = read32((u32 *)(uintptr_t)disc_tab_addr);
if (!is_crashlog_data_valid(dw0))
return false;
@@ -351,7 +351,7 @@ static bool cpu_cl_gen_discovery_table(void)
for (int i = 0; i < cpu_cl_disc_tab.header.fields.count; i++) {
cur_offset = 8 + 24 * i;
- dw0 = read32((u32 *)disc_tab_addr + cur_offset);
+ dw0 = read32((u32 *)(uintptr_t)disc_tab_addr + cur_offset);
if (!is_crashlog_data_valid(dw0))
continue;
@@ -361,7 +361,7 @@ static bool cpu_cl_gen_discovery_table(void)
break;
}
- cpu_cl_disc_tab.buffers[i].data = read64((void *)(disc_tab_addr + cur_offset));
+ cpu_cl_disc_tab.buffers[i].data = read64((void *)(uintptr_t)(disc_tab_addr + cur_offset));
printk(BIOS_DEBUG, "cpu_crashlog_discovery_table buffer: 0x%x size: "
"0x%x offset: 0x%x\n", i, cpu_cl_disc_tab.buffers[i].fields.size,
cpu_cl_disc_tab.buffers[i].fields.offset);
@@ -450,7 +450,7 @@ void cpu_cl_rearm(void)
cl_punit_control_interface_t punit_ctrl_intfc;
memset(&punit_ctrl_intfc, 0, sizeof(cl_punit_control_interface_t));
punit_ctrl_intfc.fields.set_re_arm = 1;
- write32((u32 *)(ctrl_sts_intfc_addr), punit_ctrl_intfc.data);
+ write32((u32 *)(uintptr_t)(ctrl_sts_intfc_addr), punit_ctrl_intfc.data);
if (!wait_and_check(CRASHLOG_RE_ARM_STATUS_MASK))
printk(BIOS_ERR, "CPU crashlog re_arm not asserted\n");
@@ -480,7 +480,7 @@ void cpu_cl_cleanup(void)
cl_punit_control_interface_t punit_ctrl_intfc;
memset(&punit_ctrl_intfc, 0, sizeof(cl_punit_control_interface_t));
punit_ctrl_intfc.fields.set_storage_off = 1;
- write32((u32 *)(ctrl_sts_intfc_addr), punit_ctrl_intfc.data);
+ write32((u32 *)(uintptr_t)(ctrl_sts_intfc_addr), punit_ctrl_intfc.data);
if (!wait_and_check(CRASHLOG_PUNIT_STORAGE_OFF_MASK))
printk(BIOS_ERR, "CPU crashlog storage_off not asserted\n");