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authorWisley Chen <wisley.chen@quanta.corp-partner.google.com>2018-10-09 17:04:59 +0800
committerFurquan Shaikh <furquan@google.com>2018-10-11 06:37:51 +0000
commita07efab72a6e4a44e8a3ad92a71b569e1f269426 (patch)
tree39ba2427d6d4a7ff0de3762037cde79ffb48914c /src/soc/intel
parent806ad196f3f32ce227d63cc05ee522866df88c01 (diff)
mb/google/octopus: I2C clock tuning for meep
Tune I2C params for I2C buses 0, 5, 6, and 7 to ensure that the frequency does not exceed 400KHz. BUG=b:117298114 TEST=emerge-octopus coreboot chromeos-bootimage and measured frequency under 400 KHz Change-Id: Id608aae7edf54a24f364606dd7952521d1d67c1a Signed-off-by: Wisley Chen <wisley.chen@quantatw.com> Reviewed-on: https://review.coreboot.org/29021 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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