diff options
| author | Kapil Porwal <kapilporwal@google.com> | 2022-11-15 19:06:49 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-11-19 02:40:26 +0000 |
| commit | 89ea31248e5ad2fc36cf1b31dcf041355af34c9c (patch) | |
| tree | f944e342ef6e83a6706757fc9901fb646222ab96 /src/soc/intel | |
| parent | 20c64a1210360adc880b8e4fdecc3bb2ae95fb59 (diff) | |
soc/intel/meteorlake: transition full control over PM Timer from FSP to coreboot
Set `EnableTcoTimer=1` in order to keep FSP from
1) enabling ACPI Timer emulation in uCode.
2) disabling the PM ACPI Timer.
Both actions are now done in coreboot.
`EnableTcoTimer=1` makes FSP skip these steps in any possible case
including `SkipMpInit=0`, `SkipMpInit=1`, use of the MP PPI or FSP
Multiphase Init. This way full control is left to coreboot.
Port of commit 0e905801f8ff ("soc/intel: transition full control over PM
Timer from FSP to coreboot").
NOTE: This will have a huge power impact when it's enabled. If TCO timer
is disabled, uCode ACPI timer emulation must be enabled, and WDAT table
must not be exposed to the OS.
BUG=none
TEST=Boot to OS on google/rex.
Excerpt from google/rex coreboot log:
[SPEW ] EnableTcoTimer = 1
Signed-off-by: Kapil Porwal <kapilporwal@google.com>
Change-Id: I2693f0390e6c9fa92fec366ab87589c3bcea9027
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69613
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/meteorlake/fsp_params.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/soc/intel/meteorlake/fsp_params.c b/src/soc/intel/meteorlake/fsp_params.c index 4429dc0bf1..2e1820ec05 100644 --- a/src/soc/intel/meteorlake/fsp_params.c +++ b/src/soc/intel/meteorlake/fsp_params.c @@ -349,6 +349,19 @@ static void fill_fsps_8254_params(FSP_S_CONFIG *s_cfg, s_cfg->Enable8254ClockGatingOnS3 = !CONFIG(USE_LEGACY_8254_TIMER); } +static void fill_fsps_pm_timer_params(FSP_S_CONFIG *s_cfg, + const struct soc_intel_meteorlake_config *config) +{ + /* + * Legacy PM ACPI Timer (and TCO Timer) + * This *must* be 1 in any case to keep FSP from + * 1) enabling PM ACPI Timer emulation in uCode. + * 2) disabling the PM ACPI Timer. + * We handle both by ourself! + */ + s_cfg->EnableTcoTimer = 1; +} + static void fill_fsps_pcie_params(FSP_S_CONFIG *s_cfg, const struct soc_intel_meteorlake_config *config) { @@ -429,6 +442,7 @@ static void soc_silicon_init_params(FSP_S_CONFIG *s_cfg, fill_fsps_vmd_params, fill_fsps_tbt_params, fill_fsps_8254_params, + fill_fsps_pm_timer_params, fill_fsps_pcie_params, fill_fsps_misc_power_params, fill_fsps_ufs_params, |