diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-08-18 21:12:37 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-08-20 07:46:04 +0000 |
| commit | 86ea251ba05bbfd58c69549c8b479ac309bda8ed (patch) | |
| tree | f023c2ad6a3d1f014059c5fa5e21b8f9b2e79d49 /src/soc/intel | |
| parent | 9efb7f93e9536ab28de79db385c05186b3e2e456 (diff) | |
soc/intel/xeon_sp/cpx/Kconfig: Relocate 'select CACHE_MRC_SETTINGS'
This will remove the warning:
"src/soc/intel/xeon_sp/cpx/Kconfig:79:warning: config symbol 'CPU_BCLK_MHZ' uses select, but is not boolean or tristate"
Change-Id: I2cfaf347b638e3847caa167e7efda89e9202960a
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44548
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Benjamin Doron <benjamin.doron00@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/xeon_sp/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/intel/xeon_sp/cpx/Kconfig | 2 |
2 files changed, 1 insertions, 2 deletions
diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig index cf9ba944e6..545b4232f2 100644 --- a/src/soc/intel/xeon_sp/Kconfig +++ b/src/soc/intel/xeon_sp/Kconfig @@ -17,6 +17,7 @@ config SOC_INTEL_COOPERLAKE_SP bool select XEON_SP_COMMON_BASE select PLATFORM_USES_FSP2_2 + select CACHE_MRC_SETTINGS help Intel Cooperlake-SP support diff --git a/src/soc/intel/xeon_sp/cpx/Kconfig b/src/soc/intel/xeon_sp/cpx/Kconfig index dcbadf8aab..8e7e6f1094 100644 --- a/src/soc/intel/xeon_sp/cpx/Kconfig +++ b/src/soc/intel/xeon_sp/cpx/Kconfig @@ -76,8 +76,6 @@ config CPU_BCLK_MHZ int default 100 -select CACHE_MRC_SETTINGS - # CPX-SP has 2 IMCs, 3 channels per IMC, 2 DIMMs per channel # Default value is set to one socket, full config. config DIMM_MAX |