diff options
author | Subrata Banik <subrata.banik@intel.com> | 2020-01-22 15:52:12 +0530 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-01-24 22:55:44 +0000 |
commit | 86e0ac47557984dcaa92bc1362a29b0941d735cc (patch) | |
tree | eee40d3bfc73c3698afba853737dff269d34dd98 /src/soc/intel | |
parent | 21d79ad0d5d9b94e0619be6661e71ab726f289ec (diff) |
soc/intel/skylake: Remove unused ICH memory reference
TEST=Build and boot EVE and Soraka to OS.
Change-Id: Ic7840ce264393b4a955f17b16f5e0f556e34a776
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38511
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
-rw-r--r-- | src/soc/intel/skylake/acpi/systemagent.asl | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/src/soc/intel/skylake/acpi/systemagent.asl b/src/soc/intel/skylake/acpi/systemagent.asl index 0857495304..3902b93749 100644 --- a/src/soc/intel/skylake/acpi/systemagent.asl +++ b/src/soc/intel/skylake/acpi/systemagent.asl @@ -292,19 +292,9 @@ Device (PDRC) */ Memory32Fixed (ReadWrite, 0, 0, PCIX) - /* MISC ICH TTT base address reserved for the - * TxT module use. - */ - Memory32Fixed (ReadWrite, 0xFED20000, 0x20000) - /* VTD engine memory range. */ Memory32Fixed (ReadOnly, VTD_BASE_ADDRESS, VTD_BASE_SIZE) - /* MISC ICH. Check if the hard code meets the - * real configuration. - */ - Memory32Fixed (ReadWrite, 0xFED45000, 0x4B000, TPMM) - /* FLASH range */ Memory32Fixed (ReadOnly, 0, CONFIG_ROM_SIZE, FIOH) |