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authorShuo Liu <shuo.liu@intel.com>2024-04-22 04:31:41 +0800
committerFelix Held <felix-coreboot@felixheld.de>2024-05-06 10:48:46 +0000
commit7b2b57b0b8ae451f80b97582cc6c86004aaab471 (patch)
tree51e0358849a5d81da6d9f74b31e1c688feed3630 /src/soc/intel
parent71814b0e5bedd01e6258afb26da72e28a49e0aae (diff)
soc/intel/xeon_sp/acpi: Refactor Xeon-SP ASL file location
soc/intel/xeon_sp/acpi/*.asl are actually used only by SKX and CPX platforms and not forward compatible to later SoC generations. Move them to soc/intel/xeon_sp/acpi/gen1/ for clean maintenance. TEST=Build and boot on intel/archercity CRB Change-Id: Ib060b123ab0fd761f00d9a0573e9b73d600ea9ef Signed-off-by: Shuo Liu <shuo.liu@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82033 Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/xeon_sp/acpi/gen1/gpio.asl (renamed from src/soc/intel/xeon_sp/acpi/gpio.asl)0
-rw-r--r--src/soc/intel/xeon_sp/acpi/gen1/iiostack.asl (renamed from src/soc/intel/xeon_sp/acpi/iiostack.asl)0
-rw-r--r--src/soc/intel/xeon_sp/acpi/gen1/pch.asl (renamed from src/soc/intel/xeon_sp/acpi/pch.asl)2
-rw-r--r--src/soc/intel/xeon_sp/acpi/gen1/pch_irq.asl (renamed from src/soc/intel/xeon_sp/acpi/pch_irq.asl)0
-rw-r--r--src/soc/intel/xeon_sp/acpi/gen1/pci_irqs.asl (renamed from src/soc/intel/xeon_sp/acpi/pci_irqs.asl)0
-rw-r--r--src/soc/intel/xeon_sp/acpi/gen1/southcluster.asl (renamed from src/soc/intel/xeon_sp/acpi/southcluster.asl)0
-rw-r--r--src/soc/intel/xeon_sp/acpi/gen1/uncore.asl (renamed from src/soc/intel/xeon_sp/acpi/uncore.asl)0
-rw-r--r--src/soc/intel/xeon_sp/acpi/gen1/uncore_irq.asl (renamed from src/soc/intel/xeon_sp/acpi/uncore_irq.asl)0
8 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/xeon_sp/acpi/gpio.asl b/src/soc/intel/xeon_sp/acpi/gen1/gpio.asl
index a67bdd7d5a..a67bdd7d5a 100644
--- a/src/soc/intel/xeon_sp/acpi/gpio.asl
+++ b/src/soc/intel/xeon_sp/acpi/gen1/gpio.asl
diff --git a/src/soc/intel/xeon_sp/acpi/iiostack.asl b/src/soc/intel/xeon_sp/acpi/gen1/iiostack.asl
index 0dd39a0f54..0dd39a0f54 100644
--- a/src/soc/intel/xeon_sp/acpi/iiostack.asl
+++ b/src/soc/intel/xeon_sp/acpi/gen1/iiostack.asl
diff --git a/src/soc/intel/xeon_sp/acpi/pch.asl b/src/soc/intel/xeon_sp/acpi/gen1/pch.asl
index fef68b0818..93d468a7ff 100644
--- a/src/soc/intel/xeon_sp/acpi/pch.asl
+++ b/src/soc/intel/xeon_sp/acpi/gen1/pch.asl
@@ -3,7 +3,7 @@
/* This file should be included in the proper platform ACPI \_SB PCI scope */
/* GPIO */
-#include <soc/intel/xeon_sp/acpi/gpio.asl>
+#include <soc/intel/xeon_sp/acpi/gen1/gpio.asl>
/* LPC 0:1f.0 */
#include <soc/intel/common/block/acpi/acpi/lpc.asl>
diff --git a/src/soc/intel/xeon_sp/acpi/pch_irq.asl b/src/soc/intel/xeon_sp/acpi/gen1/pch_irq.asl
index f36968f9cd..f36968f9cd 100644
--- a/src/soc/intel/xeon_sp/acpi/pch_irq.asl
+++ b/src/soc/intel/xeon_sp/acpi/gen1/pch_irq.asl
diff --git a/src/soc/intel/xeon_sp/acpi/pci_irqs.asl b/src/soc/intel/xeon_sp/acpi/gen1/pci_irqs.asl
index eccb46b93d..eccb46b93d 100644
--- a/src/soc/intel/xeon_sp/acpi/pci_irqs.asl
+++ b/src/soc/intel/xeon_sp/acpi/gen1/pci_irqs.asl
diff --git a/src/soc/intel/xeon_sp/acpi/southcluster.asl b/src/soc/intel/xeon_sp/acpi/gen1/southcluster.asl
index eb687784e7..eb687784e7 100644
--- a/src/soc/intel/xeon_sp/acpi/southcluster.asl
+++ b/src/soc/intel/xeon_sp/acpi/gen1/southcluster.asl
diff --git a/src/soc/intel/xeon_sp/acpi/uncore.asl b/src/soc/intel/xeon_sp/acpi/gen1/uncore.asl
index 8d178cbb6b..8d178cbb6b 100644
--- a/src/soc/intel/xeon_sp/acpi/uncore.asl
+++ b/src/soc/intel/xeon_sp/acpi/gen1/uncore.asl
diff --git a/src/soc/intel/xeon_sp/acpi/uncore_irq.asl b/src/soc/intel/xeon_sp/acpi/gen1/uncore_irq.asl
index e8d1b14c67..e8d1b14c67 100644
--- a/src/soc/intel/xeon_sp/acpi/uncore_irq.asl
+++ b/src/soc/intel/xeon_sp/acpi/gen1/uncore_irq.asl