diff options
| author | Matt DeVillier <matt.devillier@gmail.com> | 2017-06-04 14:37:09 -0500 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-03-06 22:32:01 +0000 |
| commit | 7440cc881c7fbbcb0f2ceab6a175aa0444f757fa (patch) | |
| tree | de9bf71e53c72a0ac90344b86d2d8147b6f3efef /src/soc/intel | |
| parent | 3ef241f0c8d8a9b112394989ea632fbe84e856ff (diff) | |
soc/intel/braswell: fix PCI resource PMAX/PLEN values
Without PMAX correctly set, the calculation for PLEN is incorrect,
leading to a Windows BSOD on boot. Correct PMAX using code from
Baytrail SoC, setting PMAX to (CONFIG_MMCONF_BASE_ADDRESS - 1).
Test: Boot Windows 10 on google/edgar without BSOD.
Change-Id: I4f2f4a0ff3a285826709f9eaafa40b0bf0cafb83
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/24985
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/braswell/acpi/southcluster.asl | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/braswell/acpi/southcluster.asl b/src/soc/intel/braswell/acpi/southcluster.asl index 76176620d8..19a58d119c 100644 --- a/src/soc/intel/braswell/acpi/southcluster.asl +++ b/src/soc/intel/braswell/acpi/southcluster.asl @@ -173,6 +173,7 @@ Method (_CRS, 0, Serialized) /* TOLM is BMBOUND accessible from IOSF so is saved in NVS */ Store (\TOLM, PMIN) + Store (Subtract(CONFIG_MMCONF_BASE_ADDRESS, 1), PMAX) Add (Subtract (PMAX, PMIN), 1, PLEN) Return (MCRS) |