diff options
| author | Mark Hsieh <mark_hsieh@wistron.corp-partner.google.com> | 2021-06-22 02:51:04 +0800 |
|---|---|---|
| committer | Nick Vaccaro <nvaccaro@google.com> | 2021-06-25 03:14:55 +0000 |
| commit | 72bdda2582d631b965538c41cc2dac0ff09718db (patch) | |
| tree | 740a3a33798b76cd8faa3313d537f2015bf9b23b /src/soc/intel | |
| parent | 62b9ed27eadedd32427800b64f7b06f1a467f5e6 (diff) | |
mb/google/brya: add generic LPDDR4 SPDs for Gimble
Add Makefile.inc to include three generic LPDDR4 SPDs for the following
parts for Gimble:
DRAM Part Name DRAM ID to assign
MT53E512M32D2NP-046 WT:E 0 (0000)
H9HCNNNCPMMLXR-NEE 1 (0001)
H9HCNNNBKMMLXR-NEE 0 (0000)
BUG=b:191574298
TEST=USE="project_gimble emerge-brya coreboot" and verify it builds
without error.
Signed-off-by: Mark Hsieh <mark_hsieh@wistron.corp-partner.google.com>
Change-Id: I60f95ac5ed7f3134882f6580335ec33632676796
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55735
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/soc/intel')
0 files changed, 0 insertions, 0 deletions