aboutsummaryrefslogtreecommitdiff
path: root/src/soc/intel
diff options
context:
space:
mode:
authorHsuan Ting Chen <roccochen@chromium.org>2021-08-12 15:47:06 +0800
committerJulius Werner <jwerner@chromium.org>2021-09-16 23:44:20 +0000
commit6260bf712a836762b18d80082505e981e040f4bc (patch)
tree70314d8702b2a8d3b293a570634f2bf7f7cb9434 /src/soc/intel
parent7a474a5bb73ba66eb32da930315e53d5fd74e207 (diff)
vboot_logic: Set VB2_CONTEXT_EC_TRUSTED in verstage_main
vboot_reference is introducing a new field (ctx) to store the current boot mode in crrev/c/2944250 (ctx->bootmode), which will be leveraged in both vboot flow and elog_add_boot_reason in coreboot. In current steps of deciding bootmode, a function vb2ex_ec_trusted is required. This function checks gpio EC_IN_RW pin and will return 'trusted' only if EC is not in RW. Therefore, we need to implement similar utilities in coreboot. We will deprecate vb2ex_ec_trusted and use the flag, VB2_CONTEXT_EC_TRUSTED, in vboot, vb2api_fw_phase1 and set that flag in coreboot, verstage_main. Also add a help function get_ec_is_trusted which needed to be implemented per mainboard. BUG=b:177196147, b:181931817 BRANCH=none TEST=Test on trogdor if manual recovery works Signed-off-by: Hsuan Ting Chen <roccochen@chromium.org> Change-Id: I479c8f80e45cc524ba87db4293d19b29bdfa2192 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57048 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/alderlake/Makefile.inc2
-rw-r--r--src/soc/intel/apollolake/Makefile.inc2
-rw-r--r--src/soc/intel/skylake/Makefile.inc1
3 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/Makefile.inc b/src/soc/intel/alderlake/Makefile.inc
index c7e0abc492..1c578f215c 100644
--- a/src/soc/intel/alderlake/Makefile.inc
+++ b/src/soc/intel/alderlake/Makefile.inc
@@ -46,6 +46,8 @@ ramstage-y += vr_config.c
ramstage-y += xhci.c
ramstage-$(CONFIG_SOC_INTEL_CRASHLOG) += crashlog.c
+verstage-y += gpio.c
+
smm-y += elog.c
smm-y += gpio.c
smm-y += p2sb.c
diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc
index 49707da1a6..3b17607a18 100644
--- a/src/soc/intel/apollolake/Makefile.inc
+++ b/src/soc/intel/apollolake/Makefile.inc
@@ -92,11 +92,13 @@ bootblock-y += gpio_glk.c
romstage-y += gpio_glk.c
smm-y += gpio_glk.c
ramstage-y += gpio_glk.c
+verstage-y += gpio_glk.c
else
bootblock-y += gpio_apl.c
romstage-y += gpio_apl.c
smm-y += gpio_apl.c
ramstage-y += gpio_apl.c
+verstage-y += gpio_apl.c
endif
CPPFLAGS_common += -I$(src)/soc/intel/apollolake/include
diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc
index c191aac607..51700b3706 100644
--- a/src/soc/intel/skylake/Makefile.inc
+++ b/src/soc/intel/skylake/Makefile.inc
@@ -20,6 +20,7 @@ bootblock-y += spi.c
bootblock-y += lpc.c
bootblock-y += uart.c
+verstage-y += gpio.c
verstage-y += gspi.c
verstage-y += pmutil.c
verstage-y += i2c.c