diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2019-09-03 11:50:06 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2019-09-03 08:21:13 +0000 |
| commit | 5dee36464e05543c9603cf3d4c2890fcd3b3f32a (patch) | |
| tree | bc99bd57008adaad1ec3b5d26c15909bd55ee3b5 /src/soc/intel | |
| parent | 1a29f4aeebb954ada3960f727512d5ddec0209e2 (diff) | |
soc/intel/common/timer: Fix cosmetic errors as per CB:35148 review
BUG=b:139798422, b:129839774
TEST=Able to build and boot KBL/CML/ICL.
Change-Id: I341eec13d275504545511904db0acd23ad34e940
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35234
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/common/block/timer/timer.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/common/block/timer/timer.c b/src/soc/intel/common/block/timer/timer.c index 8fde5419d3..70072cc850 100644 --- a/src/soc/intel/common/block/timer/timer.c +++ b/src/soc/intel/common/block/timer/timer.c @@ -38,7 +38,7 @@ static unsigned int get_max_cpuid_func(void) static unsigned long get_hardcoded_crystal_freq(void) { - unsigned int core_crystal_nominal_freq_khz; + unsigned long core_crystal_nominal_freq_khz = 0; /* * Denverton SoCs don't report crystal clock, and also don't support @@ -70,7 +70,7 @@ static unsigned long get_hardcoded_crystal_freq(void) */ static unsigned long calculate_tsc_freq_from_core_crystal(void) { - unsigned int core_crystal_nominal_freq_khz; + unsigned long core_crystal_nominal_freq_khz; struct cpuid_result cpuidr_15h; if (get_max_cpuid_func() < 0x15) |