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| author | Arthur Heymans <arthur@aheymans.xyz> | 2024-03-28 14:37:27 +0100 |
|---|---|---|
| committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2024-04-04 12:34:18 +0000 |
| commit | 579b8ae59ffcb31eed2e9ade7b6946a6d491b476 (patch) | |
| tree | 3861ff732ad3c4658b4904a5b0ad49d11dd1cdd2 /src/soc/intel | |
| parent | 9099a6bb4d1e1fc717cb090e3cd39b32f0045289 (diff) | |
soc/intel/cache_as_ram_fsp.S: Drop unused preprocessing directives
Change-Id: I42bb15b8534d16401cd06ff803a8425221c5f3c1
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81558
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S b/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S index c6d2a9c6da..4e057f046d 100644 --- a/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S +++ b/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S @@ -1,16 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ #include <cpu/x86/64bit/entry64.inc> -#include <cpu/x86/cr.h> #include <cpu/x86/post_code.h> -#include <device/pci_def.h> -#include <intelblocks/post_codes.h> - -#define CBFS_FILE_MAGIC 0 -#define CBFS_FILE_LEN (CBFS_FILE_MAGIC + 8) -#define CBFS_FILE_TYPE (CBFS_FILE_LEN + 4) -#define CBFS_FILE_CHECKSUM (CBFS_FILE_TYPE + 4) -#define CBFS_FILE_OFFSET (CBFS_FILE_CHECKSUM + 4) .section .init, "ax", @progbits |