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authorAngel Pons <th3fanbus@gmail.com>2021-03-18 16:53:00 +0100
committerAngel Pons <th3fanbus@gmail.com>2021-03-22 13:00:45 +0000
commit50811e2deb09f43ea08b1cb91c13d5f75f311ba6 (patch)
tree1a9930def1b9d2fcd501f86da89b8391c1d9f291 /src/soc/intel
parentf20ef65e65f4a71bee3173f7c16048f87fe56379 (diff)
soc/intel/broadwell: Use Lynx Point hda_verb.c
This allows dropping the SOC_INTEL_COMMON selection. Pull in the options selected by SOC_INTEL_COMMON into Broadwell Kconfig as they still apply. Change-Id: I0dd7de5358667240b0b3c1a550ba373a2a5af7d1 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51643 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/broadwell/Kconfig4
-rw-r--r--src/soc/intel/broadwell/pch/Makefile.inc1
2 files changed, 4 insertions, 1 deletions
diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig
index 7528c09fd3..5cdfb5488f 100644
--- a/src/soc/intel/broadwell/Kconfig
+++ b/src/soc/intel/broadwell/Kconfig
@@ -13,10 +13,13 @@ config SOC_SPECIFIC_OPTIONS
def_bool y
select ACPI_HAS_DEVICE_NVS
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
+ select ACPI_SOC_NVS
+ select AZALIA_PLUGIN_SUPPORT
select BOOT_DEVICE_SUPPORTS_WRITES
select CACHE_MRC_SETTINGS
select CPU_INTEL_HASWELL
select MRC_SETTINGS_PROTECT
+ select HAVE_DISPLAY_MTRRS
select HAVE_SMI_HANDLER
select SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT
select SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS
@@ -30,7 +33,6 @@ config SOC_SPECIFIC_OPTIONS
select REG_SCRIPT
select RTC
select SPI_FLASH
- select SOC_INTEL_COMMON
select INTEL_DESCRIPTOR_MODE_CAPABLE
select HAVE_EM100PRO_SPI_CONSOLE_SUPPORT
select INTEL_GMA_ACPI
diff --git a/src/soc/intel/broadwell/pch/Makefile.inc b/src/soc/intel/broadwell/pch/Makefile.inc
index c4356a9fea..b345e8daf6 100644
--- a/src/soc/intel/broadwell/pch/Makefile.inc
+++ b/src/soc/intel/broadwell/pch/Makefile.inc
@@ -8,6 +8,7 @@ ramstage-y += ../../../../southbridge/intel/lynxpoint/lp_gpio.c
romstage-y += ../../../../southbridge/intel/lynxpoint/lp_gpio.c
smm-y += ../../../../southbridge/intel/lynxpoint/lp_gpio.c
ramstage-y += hda.c
+ramstage-y += ../../../../southbridge/intel/lynxpoint/hda_verb.c
ramstage-y += iobp.c
romstage-y += iobp.c
ramstage-y += fadt.c