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authorVinod Polimera <vpolimer@codeaurora.org>2020-03-03 11:22:56 +0530
committerJulius Werner <jwerner@chromium.org>2020-09-09 22:09:09 +0000
commit4cdd0979ca6241bd664d3feb18ee96b0621f9978 (patch)
tree2e14c08b7faeec7cb704da0b806b433e237a6cb1 /src/soc/intel
parentdc92cea680328c64865fc973500ec440d4795c2f (diff)
sc7180: Add display 10nm phy & pll programming support
Adds basic headers as well as source required for display dsi 10nm phy & pll programming. Changes in V1: - add struct overlays to model hardware registers. - remove typedef structures. - remove dead code such as dual dsi,split config etc. Changes in V2: - remove panel related header files. - update the bitclock calculation using edid parameters. - add phy timing calculation function. - update copyright license. Changes in V3: - update the mdss clock structure. - remove dsi_phy_configinfo_type struct. - remove unused struct fields. Changes in V4: - update clock apis. - remove unused structures. Change-Id: I8ff400922ae594f558cf73a5aaa433a3a93347c2 Signed-off-by: Vinod Polimera <vpolimer@codeaurora.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39613 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
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