diff options
author | Furquan Shaikh <furquan@google.com> | 2020-11-25 17:15:09 -0800 |
---|---|---|
committer | Furquan Shaikh <furquan@google.com> | 2020-12-08 22:56:09 +0000 |
commit | 493937e1d67e734c2ac45f92280f2c2c22a50b85 (patch) | |
tree | 16b77de5c971be7774935c8c98846bcead32c663 /src/soc/intel | |
parent | b53280ab53e19746be04b67f73f9ce230038b1ee (diff) |
coreboot tables: Add SPI flash memory map windows to coreboot tables
This change adds details about the memory map windows to translate
addresses between SPI flash space and host address space to coreboot
tables. This is useful for payloads to setup the translation using the
decode windows already known to coreboot. Until now, there was a
single decode window at the top of 4G used by all x86
platforms. However, going forward, platforms might support more decode
windows and hence in order to avoid duplication in payloads this
information is filled in coreboot tables.
`lb_spi_flash()` is updated to fill in the details about these windows
by making a call to `spi_flash_get_mmap_windows()` which is
implemented by the driver providing the boot media mapping device.
BUG=b:171534504
Signed-off-by: Furquan Shaikh <furquan@google.com>
Change-Id: I00ae33d9b53fecd0a8eadd22531fdff8bde9ee94
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48185
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
-rw-r--r-- | src/soc/intel/apollolake/mmap_boot.c | 12 | ||||
-rw-r--r-- | src/soc/intel/common/block/fast_spi/mmap_boot.c | 24 |
2 files changed, 36 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/mmap_boot.c b/src/soc/intel/apollolake/mmap_boot.c index 79c2a0716b..23c819e3a0 100644 --- a/src/soc/intel/apollolake/mmap_boot.c +++ b/src/soc/intel/apollolake/mmap_boot.c @@ -5,6 +5,7 @@ #include <console/console.h> #include <fmap.h> #include <intelblocks/fast_spi.h> +#include <spi_flash.h> /* * BIOS region on the flash is mapped right below 4GiB in the address @@ -91,3 +92,14 @@ const struct region_device *boot_device_ro(void) return &real_dev.rdev; } + +uint32_t spi_flash_get_mmap_windows(struct flash_mmap_window *table) +{ + bios_mmap_init(); + + table->flash_base = region_offset(&real_dev_window.sub_region); + table->host_base = (uintptr_t)rdev_mmap_full(&shadow_dev.rdev); + table->size = region_sz(&real_dev_window.sub_region); + + return 1; +} diff --git a/src/soc/intel/common/block/fast_spi/mmap_boot.c b/src/soc/intel/common/block/fast_spi/mmap_boot.c index 8435a855f5..fa163d7e49 100644 --- a/src/soc/intel/common/block/fast_spi/mmap_boot.c +++ b/src/soc/intel/common/block/fast_spi/mmap_boot.c @@ -11,6 +11,7 @@ #include <console/console.h> #include <fmap.h> #include <intelblocks/fast_spi.h> +#include <spi_flash.h> enum window_type { /* Fixed decode window of max 16MiB size just below 4G boundary */ @@ -160,3 +161,26 @@ void fast_spi_get_ext_bios_window(uintptr_t *base, size_t *size) *base = (uintptr_t)rdev_mmap_full(rd); } } + +uint32_t spi_flash_get_mmap_windows(struct flash_mmap_window *table) +{ + int i; + uint32_t count = 0; + + bios_mmap_init(); + + for (i = 0; i < TOTAL_DECODE_WINDOWS; i++) { + + if (region_sz(&real_dev_windows[i].sub_region) == 0) + continue; + + count++; + table->flash_base = region_offset(&real_dev_windows[i].sub_region); + table->host_base = (uintptr_t)rdev_mmap_full(&shadow_devs[i].rdev); + table->size = region_sz(&real_dev_windows[i].sub_region); + + table++; + } + + return count; +} |