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| author | Chris Wang <chris.wang@amd.corp-partner.google.com> | 2020-09-14 17:03:06 +0800 |
|---|---|---|
| committer | Edward O'Callaghan <quasisec@chromium.org> | 2020-10-08 01:30:02 +0000 |
| commit | 3f929020c2ec3d039a3c5e1880e9dcf13628e705 (patch) | |
| tree | 7b061f56ce4a55341bf42b87cbec7757343acca8 /src/soc/intel | |
| parent | 4b5c8b554154f290d509b6db3c44f850134581b7 (diff) | |
soc/amd/picasso: Add UPD for support force USB3 to Gen1 by port
Add UPD usb3_port_force_gen1 for support USB3 port force to gen1.
BUG=b:167651308
BRANCH=zork
TEST=Build, verify the USB3 speed in gen1
Signed-off-by: Chris Wang <chris.wang@amd.corp-partner.google.com>
Change-Id: I896c185988c3ea5dbdd72957b363ebdaa2747cff
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45333
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Sam McNally <sammc@google.com>
Diffstat (limited to 'src/soc/intel')
0 files changed, 0 insertions, 0 deletions