diff options
| author | Felix Singer <felixsinger@posteo.net> | 2024-04-30 17:03:35 +0200 |
|---|---|---|
| committer | Felix Singer <service+coreboot-gerrit@felixsinger.de> | 2024-05-02 16:07:56 +0000 |
| commit | 37f0735d0c9f0865ba7b3ffe75cad0a8a5ff2d87 (patch) | |
| tree | 4cf91439b9ce7062d71fa46683307b71e94be939 /src/soc/intel | |
| parent | fbf260a0d5f3b33f32e6d45785cae13ca5515a92 (diff) | |
soc/intel/xeon_sp: Clean up device enablement configuration
Clean up by using is_devfn_enabled().
Change-Id: I9ea3d8b1b18e84a75a81a7e926d2c638766bb493
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82120
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/xeon_sp/cpx/romstage.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/soc/intel/xeon_sp/cpx/romstage.c b/src/soc/intel/xeon_sp/cpx/romstage.c index fe2ca8654a..b72417e06a 100644 --- a/src/soc/intel/xeon_sp/cpx/romstage.c +++ b/src/soc/intel/xeon_sp/cpx/romstage.c @@ -123,7 +123,6 @@ void save_dimm_info(void) void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) { FSP_M_CONFIG *m_cfg = &mupd->FspmConfig; - const struct device *dev; const config_t *config = config_of_soc(); /* ErrorLevel - 0 (disable) to 8 (verbose) */ @@ -175,8 +174,7 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) /* Enable PCH thermal device in FSP, the definition of ThermalDeviceEnable is 0: Disable, 1: Enabled in PCI mode, 2: Enabled in ACPI mode */ - dev = pcidev_path_on_root(PCH_DEVFN_THERMAL); - m_cfg->ThermalDeviceEnable = dev && dev->enabled; + m_cfg->ThermalDeviceEnable = is_devfn_enabled(PCH_DEVFN_THERMAL); /* Enable VT-d according to DTB */ m_cfg->VtdSupport = config->vtd_support; |