tree: Replace And(a,b,c) with ASL 2.0 syntax

Replace `And (a, b, c)` with `c = a & b`, respectively `c &= b` where
possible.

Change-Id: Ie558f9d0b597c56ca3b31498edb68de8877d3a2f
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70850
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

8 files changed, 31 insertions, 31 deletions

diff --git a/src/soc/intel/baytrail/acpi/lpe.asl b/src/soc/intel/baytrail/acpi/lpe.asl
index a997a6e2a0..d0ce253ff3 100644
--- a/src/soc/intel/baytrail/acpi/lpe.asl
+++ b/src/soc/intel/baytrail/acpi/lpe.asl
@@ -93,7 +93,7 @@ Device (LPEA)
 
 		Method (_ON)
 		{
-			And (PSAT, 0xfffffffc, PSAT)
+			PSAT &= 0xfffffffc
 			PSAT |= 0
 		}
 	}
diff --git a/src/soc/intel/baytrail/acpi/lpss.asl b/src/soc/intel/baytrail/acpi/lpss.asl
index 8882e0efa8..113d5c0d2f 100644
--- a/src/soc/intel/baytrail/acpi/lpss.asl
+++ b/src/soc/intel/baytrail/acpi/lpss.asl
@@ -118,7 +118,7 @@ Device (I2C1)
 
 	Method (_PS0)
 	{
-		And (PSAT, 0xfffffffc, PSAT)
+		PSAT &= 0xfffffffc
 		PSAT |= 0
 	}
 }
@@ -177,7 +177,7 @@ Device (I2C2)
 
 	Method (_PS0)
 	{
-		And (PSAT, 0xfffffffc, PSAT)
+		PSAT &= 0xfffffffc
 		PSAT |= 0
 	}
 }
@@ -236,7 +236,7 @@ Device (I2C3)
 
 	Method (_PS0)
 	{
-		And (PSAT, 0xfffffffc, PSAT)
+		PSAT &= 0xfffffffc
 		PSAT |= 0
 	}
 }
@@ -295,7 +295,7 @@ Device (I2C4)
 
 	Method (_PS0)
 	{
-		And (PSAT, 0xfffffffc, PSAT)
+		PSAT &= 0xfffffffc
 		PSAT |= 0
 	}
 }
@@ -354,7 +354,7 @@ Device (I2C5)
 
 	Method (_PS0)
 	{
-		And (PSAT, 0xfffffffc, PSAT)
+		PSAT &= 0xfffffffc
 		PSAT |= 0
 	}
 }
@@ -413,7 +413,7 @@ Device (I2C6)
 
 	Method (_PS0)
 	{
-		And (PSAT, 0xfffffffc, PSAT)
+		PSAT &= 0xfffffffc
 		PSAT |= 0
 	}
 }
@@ -472,7 +472,7 @@ Device (I2C7)
 
 	Method (_PS0)
 	{
-		And (PSAT, 0xfffffffc, PSAT)
+		PSAT &= 0xfffffffc
 		PSAT |= 0
 	}
 }
@@ -525,7 +525,7 @@ Device (SPI1)
 
 	Method (_PS0)
 	{
-		And (PSAT, 0xfffffffc, PSAT)
+		PSAT &= 0xfffffffc
 		PSAT |= 0
 	}
 }
@@ -634,7 +634,7 @@ Device (UAR1)
 
 	Method (_PS0)
 	{
-		And (PSAT, 0xfffffffc, PSAT)
+		PSAT &= 0xfffffffc
 		PSAT |= 0
 	}
 }
@@ -687,7 +687,7 @@ Device (UAR2)
 
 	Method (_PS0)
 	{
-		And (PSAT, 0xfffffffc, PSAT)
+		PSAT &= 0xfffffffc
 		PSAT |= 0
 	}
 }
diff --git a/src/soc/intel/baytrail/acpi/scc.asl b/src/soc/intel/baytrail/acpi/scc.asl
index 0dcac61021..d11173b935 100644
--- a/src/soc/intel/baytrail/acpi/scc.asl
+++ b/src/soc/intel/baytrail/acpi/scc.asl
@@ -47,7 +47,7 @@ Device (EMMC)
 
 	Method (_PS0)
 	{
-		And (PSAT, 0xfffffffc, PSAT)
+		PSAT &= 0xfffffffc
 		PSAT |= 0
 	}
 
@@ -110,7 +110,7 @@ Device (SDIO)
 
 	Method (_PS0)
 	{
-		And (PSAT, 0xfffffffc, PSAT)
+		PSAT &= 0xfffffffc
 		PSAT |= 0
 	}
 }
@@ -162,7 +162,7 @@ Device (SDCD)
 
 	Method (_PS0)
 	{
-		And (PSAT, 0xfffffffc, PSAT)
+		PSAT &= 0xfffffffc
 		PSAT |= 0
 	}
 }
diff --git a/src/soc/intel/braswell/acpi/lpe.asl b/src/soc/intel/braswell/acpi/lpe.asl
index 494fd244aa..9f400458c3 100644
--- a/src/soc/intel/braswell/acpi/lpe.asl
+++ b/src/soc/intel/braswell/acpi/lpe.asl
@@ -93,7 +93,7 @@ Device (LPEA)
 
 		Method (_ON)
 		{
-			And (PSAT, 0xfffffffc, PSAT)
+			PSAT &= 0xfffffffc
 			PSAT |= 0
 		}
 	}
diff --git a/src/soc/intel/braswell/acpi/lpss.asl b/src/soc/intel/braswell/acpi/lpss.asl
index da495b8279..2c720ffcc1 100644
--- a/src/soc/intel/braswell/acpi/lpss.asl
+++ b/src/soc/intel/braswell/acpi/lpss.asl
@@ -149,7 +149,7 @@ Device (I2C1)
 
 	Method (_PS0)
 	{
-		And (PSAT, 0xfffffffc, PSAT)
+		PSAT &= 0xfffffffc
 		PSAT |= 0
 	}
 }
@@ -208,7 +208,7 @@ Device (I2C2)
 
 	Method (_PS0)
 	{
-		And (PSAT, 0xfffffffc, PSAT)
+		PSAT &= 0xfffffffc
 		PSAT |= 0
 	}
 }
@@ -267,7 +267,7 @@ Device (I2C3)
 
 	Method (_PS0)
 	{
-		And (PSAT, 0xfffffffc, PSAT)
+		PSAT &= 0xfffffffc
 		PSAT |= 0
 	}
 }
@@ -326,7 +326,7 @@ Device (I2C4)
 
 	Method (_PS0)
 	{
-		And (PSAT, 0xfffffffc, PSAT)
+		PSAT &= 0xfffffffc
 		PSAT |= 0
 	}
 }
@@ -385,7 +385,7 @@ Device (I2C5)
 
 	Method (_PS0)
 	{
-		And (PSAT, 0xfffffffc, PSAT)
+		PSAT &= 0xfffffffc
 		PSAT |= 0
 	}
 }
@@ -444,7 +444,7 @@ Device (I2C6)
 
 	Method (_PS0)
 	{
-		And (PSAT, 0xfffffffc, PSAT)
+		PSAT &= 0xfffffffc
 		PSAT |= 0
 	}
 }
@@ -503,7 +503,7 @@ Device (I2C7)
 
 	Method (_PS0)
 	{
-		And (PSAT, 0xfffffffc, PSAT)
+		PSAT &= 0xfffffffc
 		PSAT |= 0
 	}
 }
@@ -556,7 +556,7 @@ Device (UAR1)
 
 	Method (_PS0)
 	{
-		And (PSAT, 0xfffffffc, PSAT)
+		PSAT &= 0xfffffffc
 		PSAT |= 0
 	}
 }
@@ -609,7 +609,7 @@ Device (UAR2)
 
 	Method (_PS0)
 	{
-		And (PSAT, 0xfffffffc, PSAT)
+		PSAT &= 0xfffffffc
 		PSAT |= 0
 	}
 }
diff --git a/src/soc/intel/braswell/acpi/scc.asl b/src/soc/intel/braswell/acpi/scc.asl
index 9eaf7d2d66..91c5d278f1 100644
--- a/src/soc/intel/braswell/acpi/scc.asl
+++ b/src/soc/intel/braswell/acpi/scc.asl
@@ -47,7 +47,7 @@ Device (EMMC)
 
 	Method (_PS0)
 	{
-		And (PSAT, 0xfffffffc, PSAT)
+		PSAT &= 0xfffffffc
 		PSAT |= 0
 	}
 
@@ -148,7 +148,7 @@ Device (SDIO)
 
 	Method (_PS0)
 	{
-		And (PSAT, 0xfffffffc, PSAT)
+		PSAT &= 0xfffffffc
 		PSAT |= 0
 	}
 }
@@ -200,7 +200,7 @@ Device (SDCD)
 
 	Method (_PS0)
 	{
-		And (PSAT, 0xfffffffc, PSAT)
+		PSAT &= 0xfffffffc
 		PSAT |= 0
 	}
 }
diff --git a/src/soc/intel/cannonlake/acpi/scs.asl b/src/soc/intel/cannonlake/acpi/scs.asl
index 5e8fb33f75..7def761f75 100644
--- a/src/soc/intel/cannonlake/acpi/scs.asl
+++ b/src/soc/intel/cannonlake/acpi/scs.asl
@@ -45,7 +45,7 @@ Scope (\_SB.PCI0) {
 			^^SCSC (PID_EMMC)
 
 			/* Set Power State to D0 */
-			And (PMCR, 0xFFFC, PMCR)
+			PMCR &= 0xFFFC
 			^TEMP = PMCR
 		}
 
@@ -209,7 +209,7 @@ Scope (\_SB.PCI0) {
 			^^SCSC (PID_SDX)
 
 			/* Set Power State to D0 */
-			And (PMCR, 0xFFFC, PMCR)
+			PMCR &= 0xFFFC
 			^TEMP = PMCR
 
 #if CONFIG(MB_HAS_ACTIVE_HIGH_SD_PWR_ENABLE)
diff --git a/src/soc/intel/icelake/acpi/scs.asl b/src/soc/intel/icelake/acpi/scs.asl
index 2ec8569e8a..8fbbfaf4a2 100644
--- a/src/soc/intel/icelake/acpi/scs.asl
+++ b/src/soc/intel/icelake/acpi/scs.asl
@@ -43,7 +43,7 @@ Scope (\_SB.PCI0) {
 			^^SCSC (PID_EMMC)
 
 			/* Set Power State to D0 */
-			And (PMCR, 0xFFFC, PMCR)
+			PMCR &= 0xFFFC
 			^TEMP = PMCR
 		}
 
@@ -96,7 +96,7 @@ Scope (\_SB.PCI0) {
 			^^SCSC (PID_SDX)
 
 			/* Set Power State to D0 */
-			And (PMCR, 0xFFFC, PMCR)
+			PMCR &= 0xFFFC
 			^TEMP = PMCR
 		}