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authorJonathan Zhang <jonzhang@meta.com>2023-01-30 11:32:26 -0800
committerFelix Held <felix-coreboot@felixheld.de>2023-02-23 12:16:49 +0000
commit2e495b09d52f83622c83258059de8f5c92b3ef6b (patch)
treeb35eb8ad64fe07a542e30708b5b07fa1c6c8b6b6 /src/soc/intel
parent23ef60de984bb67e90cc08edb2852d989d47c616 (diff)
soc/intel/xeon_sp/uncore.c: mark TSEG/SMM region as reserved
Change-Id: I5f534a898de4ba58ac7d65c5bd6ee10eafa648e4 Signed-off-by: Jonathan Zhang <jonzhang@meta.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72614 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Zhang <jonzhang@fb.com> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/xeon_sp/uncore.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/intel/xeon_sp/uncore.c b/src/soc/intel/xeon_sp/uncore.c
index 380b7e7b9c..8729cf2540 100644
--- a/src/soc/intel/xeon_sp/uncore.c
+++ b/src/soc/intel/xeon_sp/uncore.c
@@ -196,6 +196,11 @@ static void mc_add_dram_resources(struct device *dev, int *res_count)
res = ram_from_to(dev, index++, top_of_ram, (uintptr_t)cbmem_top());
LOG_RESOURCE("cbmem_ram", dev, res);
+ /* Mark TSEG/SMM region as reserved */
+ res = reserved_ram_from_to(dev, index++, mc_values[TSEG_BASE_REG],
+ mc_values[TSEG_LIMIT_REG] + 1);
+ LOG_RESOURCE("mmio_tseg", dev, res);
+
/* Reserve DPR region */
union dpr_register dpr = { .raw = pci_read_config32(dev, VTD_LTDPR) };
if (dpr.size) {