diff options
| author | Kane Chen <kane_chen@pegatron.corp-partner.google.com> | 2021-02-24 17:45:07 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-03-01 08:32:06 +0000 |
| commit | 13818f5c5cd55ce8bfa3c5942978a07c2d80f5eb (patch) | |
| tree | b4b057175b1899dea22b224622f9ffc6d82b439d /src/soc/intel | |
| parent | d992944d09d8262755d5e993141e744606b679ac (diff) | |
mb/google/zork/var/shuboz: Decrease I2C3 CLK below 400 kHz
Modify I2C3 setting to follow I2C specification (lower than 400kHz).
Original setting:
.rise_time_ns = 184
.fall_time_ns = 42
Change to:
.rise_time_ns = 110
.fall_time_ns = 34
BUG=b:181091107
BRANCH=zork
TEST=emerge-zork coreboot chromeos-bootimage
Signed-off-by: Kane Chen <kane_chen@pegatron.corp-partner.google.com>
Change-Id: Ibdbb9a7dde524bdbde4789ee7ea005646080d97a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51052
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/soc/intel')
0 files changed, 0 insertions, 0 deletions